u-boot/arch/arm/dts/tegra20-colibri.dts
Stephen Warren 2f6a7e8ce5 ARM: tegra: fix USB ULPI PHY reset signal inversion confusion
USB ULPI PHY reset signals are typically active low. Consequently, they
should be marked as GPIO_ACTIVE_LOW in device tree, and indeed they are in
the Linux kernel DTs, and in DT properties that U-Boot doesn't yet use.
However, in DT properties that U-Boot does use, the value has been set to
0 (== GPIO_ACTIVE_HIGH) to work around a bug in U-Boot.

This change fixes the DT to correctly represent the HW, and fixes the
Tegra USB driver to cope with the fact that dm_gpio_set_value() internally
handles any inversions implied by the DT value GPIO_ACTIVE_LOW.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:03 -07:00

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2.4 KiB
Text

/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "Toradex Colibri T20";
compatible = "toradex,colibri_t20", "nvidia,tegra20";
chosen {
stdout-path = &uarta;
};
aliases {
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
usb2 = "/usb@c5004000";
mmc0 = "/sdhci@c8000600";
};
host1x@50000000 {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
usb@c5000000 {
statuc = "okay";
dr_mode = "otg";
};
usb@c5004000 {
statuc = "okay";
/* VBUS_LAN */
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
};
usb@c5008000 {
statuc = "okay";
/* USBH_PEN */
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
};
nand-controller@70008000 {
nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
nvidia,width = <8>;
nvidia,timing = <15 100 25 80 25 10 15 10 100>;
nand@0 {
reg = <0>;
compatible = "nand-flash";
};
};
/*
* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
* board)
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
/* GEN2_I2C: unused */
/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
/*
* PWR_I2C: power I2C to PMIC and temperature sensor
*/
i2c@7000d000 {
status = "okay";
clock-frequency = <100000>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
pwm: pwm@7000a000 {
status = "okay";
};
lcd_panel: panel {
clock = <25175000>;
xres = <640>;
yres = <480>;
left-margin = <48>; /* horizontal back porch */
right-margin = <16>; /* horizontal front porch */
hsync-len = <96>;
lower-margin = <11>; /* vertical front porch */
upper-margin = <31>; /* vertical back porch */
vsync-len = <2>;
hsync-active-high;
vsync-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 0 0>;
nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
nvidia,panel-timings = <0 0 0 0>;
};
};