mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
7ffe3cd62e
Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT: config OF_BOARD_SETUP bool "Set up board-specific details in device tree before boot" depends on OF_LIBFDT ... remove superfluous tests of CONFIG_OF_LIBFDT when testing for CONFIG_OF_BOARD_SETUP. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Typo fix: s/ifdefi/ifdef/] Signed-off-by: Tom Rini <trini@konsulko.com>
155 lines
3.6 KiB
C
155 lines
3.6 KiB
C
/*
|
|
* (C) Copyright 2007
|
|
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <mpc5xxx.h>
|
|
#include <pci.h>
|
|
|
|
#include "mt48lc16m16a2-75.h"
|
|
|
|
#ifndef CONFIG_SYS_RAMBOOT
|
|
static void sdram_start (int hi_addr)
|
|
{
|
|
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
|
|
|
|
/* unlock mode register */
|
|
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
|
|
__asm__ volatile ("sync");
|
|
|
|
/* precharge all banks */
|
|
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
|
|
__asm__ volatile ("sync");
|
|
|
|
#if SDRAM_DDR
|
|
/* set mode register: extended mode */
|
|
*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
|
|
__asm__ volatile ("sync");
|
|
|
|
/* set mode register: reset DLL */
|
|
*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
|
|
__asm__ volatile ("sync");
|
|
#endif
|
|
|
|
/* precharge all banks */
|
|
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
|
|
__asm__ volatile ("sync");
|
|
|
|
/* auto refresh */
|
|
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
|
|
__asm__ volatile ("sync");
|
|
|
|
/* set mode register */
|
|
*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
|
|
__asm__ volatile ("sync");
|
|
|
|
/* normal operation */
|
|
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
|
|
__asm__ volatile ("sync");
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* ATTENTION: Although partially referenced initdram does NOT make real use
|
|
* use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
|
|
* is something else than 0x00000000.
|
|
*/
|
|
|
|
phys_size_t initdram (int board_type)
|
|
{
|
|
ulong dramsize = 0;
|
|
ulong dramsize2 = 0;
|
|
#ifndef CONFIG_SYS_RAMBOOT
|
|
ulong test1, test2;
|
|
|
|
/* setup SDRAM chip selects */
|
|
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
|
|
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
|
|
__asm__ volatile ("sync");
|
|
|
|
/* setup config registers */
|
|
*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
|
|
*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
|
|
__asm__ volatile ("sync");
|
|
|
|
#if SDRAM_DDR && SDRAM_TAPDELAY
|
|
/* set tap delay */
|
|
*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
|
|
__asm__ volatile ("sync");
|
|
#endif
|
|
|
|
/* find RAM size using SDRAM CS0 only */
|
|
sdram_start(0);
|
|
test1 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
|
|
sdram_start(1);
|
|
test2 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
|
|
if (test1 > test2) {
|
|
sdram_start(0);
|
|
dramsize = test1;
|
|
} else {
|
|
dramsize = test2;
|
|
}
|
|
|
|
/* memory smaller than 1MB is impossible */
|
|
if (dramsize < (1 << 20)) {
|
|
dramsize = 0;
|
|
}
|
|
|
|
/* set SDRAM CS0 size according to the amount of RAM found */
|
|
if (dramsize > 0) {
|
|
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
|
|
} else {
|
|
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
|
|
}
|
|
|
|
#else /* CONFIG_SYS_RAMBOOT */
|
|
|
|
/* retrieve size of memory connected to SDRAM CS0 */
|
|
dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
|
|
if (dramsize >= 0x13) {
|
|
dramsize = (1 << (dramsize - 0x13)) << 20;
|
|
} else {
|
|
dramsize = 0;
|
|
}
|
|
|
|
/* retrieve size of memory connected to SDRAM CS1 */
|
|
dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
|
|
if (dramsize2 >= 0x13) {
|
|
dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
|
|
} else {
|
|
dramsize2 = 0;
|
|
}
|
|
|
|
#endif /* CONFIG_SYS_RAMBOOT */
|
|
|
|
return dramsize + dramsize2;
|
|
}
|
|
|
|
int checkboard (void)
|
|
{
|
|
puts ("Board: MUNICes\n");
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PCI
|
|
static struct pci_controller hose;
|
|
|
|
extern void pci_mpc5xxx_init(struct pci_controller *);
|
|
|
|
void pci_init_board(void)
|
|
{
|
|
pci_mpc5xxx_init(&hose);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_OF_BOARD_SETUP
|
|
int ft_board_setup(void *blob, bd_t *bd)
|
|
{
|
|
ft_cpu_setup(blob, bd);
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_OF_BOARD_SETUP */
|