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https://github.com/AsahiLinux/u-boot
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989ce04999
Add bcm281xx architecture support code including a clock framework and chip reset. Define register block base addresses for the bcm281xx architecture and create an empty gpio header file required when CONFIG_CMD_GPIO is set. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
25 lines
685 B
C
25 lines
685 B
C
/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ARCH_BCM281XX_SYSMAP_H
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#define BSC1_BASE_ADDR 0x3e016000
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#define BSC2_BASE_ADDR 0x3e017000
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#define BSC3_BASE_ADDR 0x3e018000
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#define GPIO2_BASE_ADDR 0x35003000
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#define KONA_MST_CLK_BASE_ADDR 0x3f001000
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#define KONA_SLV_CLK_BASE_ADDR 0x3e011000
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#define PMU_BSC_BASE_ADDR 0x3500d000
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#define PWRMGR_BASE_ADDR 0x35010000
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#define SDIO1_BASE_ADDR 0x3f180000
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#define SDIO2_BASE_ADDR 0x3f190000
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#define SDIO3_BASE_ADDR 0x3f1a0000
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#define SDIO4_BASE_ADDR 0x3f1b0000
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#define SECWD_BASE_ADDR 0x3500c000
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#define SECWD2_BASE_ADDR 0x35002f40
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#define TIMER_BASE_ADDR 0x3e00d000
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#endif
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