mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Based on Linux/Xtensa kernel version
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*
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* Copyright (C) 2001 - 2007 Tensilica Inc.
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*/
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#ifndef _XTENSA_BYTEORDER_H
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#define _XTENSA_BYTEORDER_H
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#include <asm/types.h>
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static inline __attribute__((const)) __u32 ___arch__swab32(__u32 x)
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{
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__u32 res;
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/* instruction sequence from Xtensa ISA release 2/2000 */
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__asm__("ssai 8\n\t"
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"srli %0, %1, 16\n\t"
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"src %0, %0, %1\n\t"
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"src %0, %0, %0\n\t"
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"src %0, %1, %0\n"
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: "=&a" (res)
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: "a" (x)
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);
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return res;
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}
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static inline __attribute__((const)) __u16 ___arch__swab16(__u16 x)
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{
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/*
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* Given that 'short' values are signed (i.e., can be negative),
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* we cannot assume that the upper 16-bits of the register are
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* zero. We are careful to mask values after shifting.
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*/
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/*
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* There exists an anomaly between xt-gcc and xt-xcc. xt-gcc
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* inserts an extui instruction after putting this function inline
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* to ensure that it uses only the least-significant 16 bits of
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* the result. xt-xcc doesn't use an extui, but assumes the
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* __asm__ macro follows convention that the upper 16 bits of an
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* 'unsigned short' result are still zero. This macro doesn't
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* follow convention; indeed, it leaves garbage in the upport 16
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* bits of the register.
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*
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* Declaring the temporary variables 'res' and 'tmp' to be 32-bit
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* types while the return type of the function is a 16-bit type
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* forces both compilers to insert exactly one extui instruction
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* (or equivalent) to mask off the upper 16 bits.
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*/
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__u32 res;
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__u32 tmp;
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__asm__("extui %1, %2, 8, 8\n\t"
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"slli %0, %2, 8\n\t"
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"or %0, %0, %1\n"
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: "=&a" (res), "=&a" (tmp)
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: "a" (x)
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);
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return res;
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}
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#define __arch__swab32(x) ___arch__swab32(x)
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#define __arch__swab16(x) ___arch__swab16(x)
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#ifdef __XTENSA_EL__
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# include <linux/byteorder/little_endian.h>
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#elif defined(__XTENSA_EB__)
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# include <linux/byteorder/big_endian.h>
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#else
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# error processor byte order undefined!
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#endif
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#endif /* _XTENSA_BYTEORDER_H */
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