Tom Warren 8ca79b2ff4 Tegra30: Cardhu: Add pad config tables/code based on pinmux code ... Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, only SDIO1CFG is changed as per the TRM to work with the SD-card slot on Cardhu. Thanks to StephenW for the suggestion/original idea. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>		2013-03-14 11:06:43 -07:00
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clock.c	tegra30: add SBC1 to periph id mapping table	2013-02-11 10:35:24 -07:00
funcmux.c	Tegra30: Add common CPU (shared) files	2013-01-16 13:40:07 -07:00
Makefile	Tegra30: Add common CPU (shared) files	2013-01-16 13:40:07 -07:00
pinmux.c	Tegra30: Cardhu: Add pad config tables/code based on pinmux code	2013-03-14 11:06:43 -07:00