mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 08:31:03 +00:00
c1352119fd
Update the link script to drop this code when not needed. This is only done for two architectures at present. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
191 lines
3.4 KiB
Text
191 lines
3.4 KiB
Text
/*
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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#ifndef CONFIG_CMDLINE
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/DISCARD/ : { *(.u_boot_list_2_cmd_*) }
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#endif
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#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
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/*
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* If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
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* bundle with u-boot, and code offsets are fixed. Secure zone
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* only needs to be copied from the loading address to
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* CONFIG_ARMV7_SECURE_BASE, which is the linking and running
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* address for secure code.
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*
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* If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
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* be included in u-boot address space, and some absolute address
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* were used in secure code. The absolute addresses of the secure
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* code also needs to be relocated along with the accompanying u-boot
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* code.
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*
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* So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
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*/
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/DISCARD/ : { *(.rel._secure*) }
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#endif
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. = 0x00000000;
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. = ALIGN(4);
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.text :
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{
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*(.__image_copy_start)
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*(.vectors)
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CPUDIR/start.o (.text*)
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*(.text*)
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}
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#ifdef CONFIG_ARMV7_NONSEC
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#ifndef CONFIG_ARMV7_SECURE_BASE
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#define CONFIG_ARMV7_SECURE_BASE
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#endif
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.__secure_start : {
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. = ALIGN(0x1000);
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*(.__secure_start)
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}
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.secure_text CONFIG_ARMV7_SECURE_BASE :
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AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
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{
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*(._secure.text)
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}
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. = LOADADDR(.__secure_start) +
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SIZEOF(.__secure_start) +
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SIZEOF(.secure_text);
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__secure_end_lma = .;
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.__secure_end : AT(__secure_end_lma) {
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*(.__secure_end)
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LONG(0x1d1071c); /* Must output something to reset LMA */
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}
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#endif
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : {
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*(.data*)
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}
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. = ALIGN(4);
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. = .;
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. = ALIGN(4);
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.u_boot_list : {
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KEEP(*(SORT(.u_boot_list*)));
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}
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. = ALIGN(4);
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.__efi_runtime_start : {
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*(.__efi_runtime_start)
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}
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.efi_runtime : {
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*(efi_runtime_text)
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*(efi_runtime_data)
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}
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.__efi_runtime_stop : {
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*(.__efi_runtime_stop)
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}
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.efi_runtime_rel_start :
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{
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*(.__efi_runtime_rel_start)
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}
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.efi_runtime_rel : {
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*(.relefi_runtime_text)
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*(.relefi_runtime_data)
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}
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.efi_runtime_rel_stop :
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{
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*(.__efi_runtime_rel_stop)
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}
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. = ALIGN(4);
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.image_copy_end :
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{
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*(.__image_copy_end)
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}
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.rel_dyn_start :
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{
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*(.__rel_dyn_start)
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}
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.rel.dyn : {
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*(.rel*)
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}
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.rel_dyn_end :
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{
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*(.__rel_dyn_end)
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}
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.end :
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{
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*(.__end)
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}
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_image_binary_end = .;
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/*
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* Deprecated: this MMU section is used by pxa at present but
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* should not be used by new boards/CPUs.
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*/
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. = ALIGN(4096);
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.mmutable : {
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*(.mmutable)
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}
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/*
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* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
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* __bss_base and __bss_limit are for linker only (overlay ordering)
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*/
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.bss_start __rel_dyn_start (OVERLAY) : {
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KEEP(*(.__bss_start));
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__bss_base = .;
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}
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.bss __bss_base (OVERLAY) : {
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*(.bss*)
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. = ALIGN(4);
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__bss_limit = .;
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}
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.bss_end __bss_limit (OVERLAY) : {
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KEEP(*(.__bss_end));
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}
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.dynsym _image_binary_end : { *(.dynsym) }
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.dynbss : { *(.dynbss) }
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.dynstr : { *(.dynstr*) }
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.dynamic : { *(.dynamic*) }
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.plt : { *(.plt*) }
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.interp : { *(.interp*) }
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.gnu.hash : { *(.gnu.hash) }
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.gnu : { *(.gnu*) }
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.ARM.exidx : { *(.ARM.exidx*) }
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.gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
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}
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