mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
72242e5439
Synchronize R-Car Gen3 clock tables with Linux 5.0, commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+
|
|
*
|
|
* Copyright (C) 2017 Glider bvba
|
|
*/
|
|
#ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
|
|
#define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
|
|
|
|
#include <dt-bindings/clock/renesas-cpg-mssr.h>
|
|
|
|
/* r8a77995 CPG Core Clocks */
|
|
#define R8A77995_CLK_Z2 0
|
|
#define R8A77995_CLK_ZG 1
|
|
#define R8A77995_CLK_ZTR 2
|
|
#define R8A77995_CLK_ZT 3
|
|
#define R8A77995_CLK_ZX 4
|
|
#define R8A77995_CLK_S0D1 5
|
|
#define R8A77995_CLK_S1D1 6
|
|
#define R8A77995_CLK_S1D2 7
|
|
#define R8A77995_CLK_S1D4 8
|
|
#define R8A77995_CLK_S2D1 9
|
|
#define R8A77995_CLK_S2D2 10
|
|
#define R8A77995_CLK_S2D4 11
|
|
#define R8A77995_CLK_S3D1 12
|
|
#define R8A77995_CLK_S3D2 13
|
|
#define R8A77995_CLK_S3D4 14
|
|
#define R8A77995_CLK_S1D4C 15
|
|
#define R8A77995_CLK_S3D1C 16
|
|
#define R8A77995_CLK_S3D2C 17
|
|
#define R8A77995_CLK_S3D4C 18
|
|
#define R8A77995_CLK_LB 19
|
|
#define R8A77995_CLK_CL 20
|
|
#define R8A77995_CLK_ZB3 21
|
|
#define R8A77995_CLK_ZB3D2 22
|
|
#define R8A77995_CLK_CR 23
|
|
#define R8A77995_CLK_CRD2 24
|
|
#define R8A77995_CLK_SD0H 25
|
|
#define R8A77995_CLK_SD0 26
|
|
/* CLK_SSP2 was removed */
|
|
/* CLK_SSP1 was removed */
|
|
#define R8A77995_CLK_RPC 29
|
|
#define R8A77995_CLK_RPCD2 30
|
|
#define R8A77995_CLK_ZA2 31
|
|
#define R8A77995_CLK_ZA8 32
|
|
#define R8A77995_CLK_Z2D 33
|
|
#define R8A77995_CLK_CANFD 34
|
|
#define R8A77995_CLK_MSO 35
|
|
#define R8A77995_CLK_R 36
|
|
#define R8A77995_CLK_OSC 37
|
|
#define R8A77995_CLK_LV0 38
|
|
#define R8A77995_CLK_LV1 39
|
|
#define R8A77995_CLK_CP 40
|
|
#define R8A77995_CLK_CPEX 41
|
|
|
|
#endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */
|