u-boot/arch/arm/dts/imx8mm-evk-u-boot.dtsi
Haibo Chen 8974ff1a60 mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessary
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need
around 18ms, common code only delay 10ms, so need to delay extra 8ms.
Otherwise voltage switch will timeout when wait for data0 line.

This IO voltage switch time depends on board design, depend on the
PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF
capacitance.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:59:50 +02:00

253 lines
3.3 KiB
Text

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
*/
/ {
binman: binman {
multiple-images;
};
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
u-boot,dm-spl;
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&reg_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
};
&pinctrl_reg_usdhc2_vmmc {
u-boot,dm-spl;
};
&pinctrl_uart2 {
u-boot,dm-spl;
};
&pinctrl_usdhc2_gpio {
u-boot,dm-spl;
};
&pinctrl_usdhc2 {
u-boot,dm-spl;
};
&pinctrl_usdhc3 {
u-boot,dm-spl;
};
&gpio1 {
u-boot,dm-spl;
};
&gpio2 {
u-boot,dm-spl;
};
&gpio3 {
u-boot,dm-spl;
};
&gpio4 {
u-boot,dm-spl;
};
&gpio5 {
u-boot,dm-spl;
};
&uart2 {
u-boot,dm-spl;
};
&usdhc1 {
u-boot,dm-spl;
};
&usdhc2 {
u-boot,dm-spl;
sd-uhs-sdr104;
sd-uhs-ddr50;
fsl,signal-voltage-switch-extra-delay-ms = <8>;
};
&usdhc3 {
u-boot,dm-spl;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
};
&i2c1 {
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
u-boot,dm-spl;
};
&pinctrl_i2c1 {
u-boot,dm-spl;
};
&pinctrl_pmic {
u-boot,dm-spl;
};
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
&wdog1 {
u-boot,dm-spl;
};
&binman {
u-boot-spl-ddr {
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
align-size = <4>;
align = <4>;
u-boot-spl {
align-end = <4>;
};
blob_1: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
};
blob_2: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
};
blob_3: blob-ext@3 {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
};
blob_4: blob-ext@4 {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>;
};
};
flash {
mkimage {
args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
blob {
filename = "u-boot-spl-ddr.bin";
};
};
};
itb {
filename = "u-boot.itb";
fit {
description = "Configuration to load ATF before U-Boot";
#address-cells = <1>;
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
images {
uboot {
description = "U-Boot (64-bit)";
type = "standalone";
arch = "arm64";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
};
};
atf {
description = "ARM Trusted Firmware";
type = "firmware";
arch = "arm64";
compression = "none";
load = <0x920000>;
entry = <0x920000>;
atf_blob: blob-ext {
filename = "bl31.bin";
};
};
fdt {
description = "NAME";
type = "flat_dt";
compression = "none";
uboot_fdt_blob: blob-ext {
filename = "u-boot.dtb";
};
};
};
configurations {
default = "conf";
conf {
description = "NAME";
firmware = "uboot";
loadables = "atf";
fdt = "fdt";
};
};
};
};
};