mirror of
https://github.com/AsahiLinux/u-boot
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1ee774d209
This converts the following to Kconfig: CONFIG_SYS_SPI_U_BOOT_OFFS Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> [trini: Expose this for SPL_SPI_SUNXI for now] Signed-off-by: Tom Rini <trini@konsulko.com>
203 lines
6.8 KiB
C
203 lines
6.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* brtpp1.h
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*
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* specific parts for B&R T-Series Motherboard
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*
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* Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
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* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
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*/
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#ifndef __CONFIG_BRPPT1_H__
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#define __CONFIG_BRPPT1_H__
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#include <configs/bur_cfg_common.h>
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#include <configs/bur_am335x_common.h>
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/* ------------------------------------------------------------------------- */
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/* memory */
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#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
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#define CONFIG_SYS_BOOTM_LEN SZ_32M
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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#define CONFIG_POWER_TPS65217
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/* Support both device trees and ATAGs. */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*#define CONFIG_MACH_TYPE 3589*/
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#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/
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/*
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* When we have NAND flash we expect to be making use of mtdparts,
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* both for ease of use in U-Boot and for passing information on to
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* the Linux kernel.
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*/
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000
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/* RAW SD card / eMMC */
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
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/* NAND */
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
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#endif /* CONFIG_NAND */
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#endif /* CONFIG_SPL_OS_BOOT */
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#endif /* CONFIG_NAND */
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#ifdef CONFIG_NAND
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#define NANDTGTS \
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"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \
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" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \
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"nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \
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"root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \
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"b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \
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"run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
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"b_tgts_std=usb0 nand net\0" \
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"b_tgts_rcy=net usb0 nand\0" \
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"b_tgts_pme=usb0 nand net\0"
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#else
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#define NANDTGTS ""
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#endif /* CONFIG_NAND */
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#define MMCSPI_TGTS \
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"t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
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"b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \
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"b_t30lgcy#0=" \
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"load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \
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"load ${loaddev}:2 ${loadaddr} /boot/zImage && " \
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"load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \
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"load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\
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"run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
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"t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
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"b_mode=${b_mode}\0" \
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"b_t30lgcy#1=" \
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"load ${loaddev}:1 ${loadaddr} zImage && " \
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"load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \
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"load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \
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"run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \
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"b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \
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"b_mmc1=load ${loaddev}:1 ${scraddr} /boot/bootscr.img && source ${scraddr}\0" \
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"b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \
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"b_tgts_rcy=t30lgcy#1 usb0 net\0" \
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"b_tgts_pme=net usb0 mmc0 mmc1\0" \
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"loaddev=mmc 1\0"
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#ifdef CONFIG_ENV_IS_IN_MMC
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#define MMCTGTS \
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MMCSPI_TGTS \
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"cfgscr=mw ${dtbaddr} 0;" \
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" mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \
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" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0"
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#else
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#define MMCTGTS ""
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#endif /* CONFIG_MMC */
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#ifdef CONFIG_SPI
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#define SPITGTS \
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MMCSPI_TGTS \
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"cfgscr=mw ${dtbaddr} 0;" \
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" sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \
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" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0"
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#else
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#define SPITGTS ""
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#endif /* CONFIG_SPI */
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#define LOAD_OFFSET(x) 0x8##x
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BUR_COMMON_ENV \
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"verify=no\0" \
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"autoload=0\0" \
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"scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \
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"cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \
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"dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \
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"loadaddr=" __stringify(LOAD_OFFSET(0100000)) "\0" \
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"ramaddr=" __stringify(LOAD_OFFSET(2000000)) "\0" \
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"console=ttyO0,115200n8\0" \
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"optargs=consoleblank=0 quiet panic=2\0" \
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"b_break=0\0" \
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"b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \
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"b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \
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MMCTGTS \
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SPITGTS \
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NANDTGTS \
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"b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \
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" elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \
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" else setenv b_tgts ${b_tgts_std}; fi\0" \
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"b_default=run b_deftgts; for target in ${b_tgts};"\
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" do echo \"### booting ${target} ###\"; run b_${target};" \
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" if test ${b_break} = 1; then; exit; fi; done\0"
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#endif /* !CONFIG_SPL_BUILD*/
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#ifdef CONFIG_NAND
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/*
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* GPMC block. We support 1 device and the physical address to
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* access CS0 at is 0x8000000.
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*/
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x8000000
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/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_NAND_OMAP_GPMC_WSCFG 1
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#endif /* CONFIG_NAND */
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#if defined(CONFIG_SPI)
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/* SPI Flash */
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/* Environment */
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
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CONFIG_ENV_SECT_SIZE)
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#elif defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#define CONFIG_SYS_MMC_ENV_PART 2
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#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#elif defined(CONFIG_ENV_IS_IN_NAND)
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/* No NAND env support in SPL */
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE
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#else
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#error "no storage for Environment defined!"
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#endif
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#endif /* ! __CONFIG_BRPPT1_H__ */
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