mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-27 15:12:21 +00:00
73223f0e1b
There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this. Move these options to Kconfig and tidy up board configuration: CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL. Note: Masahiro's moveconfig.py script is amazing. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
443 lines
13 KiB
C
443 lines
13 KiB
C
/*
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* Copyright (C) 2013 Gateworks Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SPL */
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_POWER_SUPPORT
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/* Location in NAND to read U-Boot from */
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#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
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/* Falcon Mode */
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#define CONFIG_CMD_SPL
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#define CONFIG_SPL_OS_BOOT
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#define CONFIG_SPL_ENV_SUPPORT
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
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#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
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/* Falcon Mode - NAND support: args@17MB kernel@18MB */
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#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
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/* Falcon Mode - MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
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#include "imx6_spl.h" /* common IMX6 SPL configuration */
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#include "mx6_common.h"
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#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
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/* Serial ATAG */
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#define CONFIG_SERIAL_TAG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
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/* Init Functions */
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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/* Driver Model */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_DM_GPIO
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#define CONFIG_DM_THERMAL
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#endif
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* Thermal */
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#define CONFIG_IMX_THERMAL
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/* Serial */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#ifdef CONFIG_SPI_FLASH
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/* SPI */
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#define CONFIG_CMD_SF
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#ifdef CONFIG_CMD_SF
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#define CONFIG_MXC_SPI
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#define CONFIG_SPI_FLASH_MTD
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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/* GPIO 3-19 (21248) */
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#endif
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#else
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/* Enable NAND support */
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#define CONFIG_CMD_TIME
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* DMA stuff, needed for GPMI/MXS NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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#endif
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#endif /* CONFIG_SPI_FLASH */
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_I2C_GSC 0
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#define CONFIG_I2C_PMIC 1
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#define CONFIG_I2C_EDID
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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/* Filesystem support */
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#define CONFIG_CMD_UBIFS
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/*
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* SATA Configs
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*/
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#define CONFIG_CMD_SATA
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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/*
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* PCI express
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*/
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#define CONFIG_CMD_PCI
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCI_FIXUP_DEV
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#define CONFIG_PCIE_IMX
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#endif
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/*
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* PMIC
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*/
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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#define CONFIG_POWER_LTC3676
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#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
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/* Various command support */
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
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#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
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#define CONFIG_CMD_GSC
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#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
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#define CONFIG_CMD_UBI
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#define CONFIG_RBTREE
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/* Ethernet support */
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_ARP_TIMEOUT 200UL
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_KEYBOARD
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#define CONFIG_CI_UDC
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#define CONFIG_USBD_HS
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_CDC
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#define CONFIG_NETCONSOLE
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
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/* USB Mass Storage Gadget */
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#define CONFIG_USB_GADGET
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#define CONFIG_CMD_USB_MASS_STORAGE
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_USB_GADGET_DOWNLOAD
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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/* Netchip IDs */
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#define CONFIG_G_DNL_VENDOR_NUM 0x0525
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#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
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#define CONFIG_G_DNL_MANUFACTURER "Gateworks"
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/* Framebuffer and LCD */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_IPUV3_CLK 260000000
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#define CONFIG_CMD_HDMIDETECT
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_IMX_HDMI
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#define CONFIG_IMX_VIDEO_SKIP
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/* Miscellaneous configurable options */
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#define CONFIG_HWCONFIG
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Memory configuration */
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/*
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* MTD Command for mtdparts
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*/
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#define CONFIG_LZO
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#ifdef CONFIG_SPI_FLASH
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#define MTDIDS_DEFAULT "nor0=nor"
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#define MTDPARTS_DEFAULT \
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"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
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#else
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#define MTDIDS_DEFAULT "nand0=nand"
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#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
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#endif
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/* Persistent Environment Config */
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#ifdef CONFIG_SPI_FLASH
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#else
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#define CONFIG_ENV_IS_IN_NAND
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#endif
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_OFFSET (709 * SZ_1K)
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#define CONFIG_ENV_SIZE (128 * SZ_1K)
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
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#elif defined(CONFIG_ENV_IS_IN_NAND)
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#define CONFIG_ENV_OFFSET (16 * SZ_1M)
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#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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#define CONFIG_ENV_OFFSET (512 * SZ_1K)
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#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
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#define CONFIG_ENV_SIZE (8 * SZ_1K)
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#endif
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/* Environment */
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#define CONFIG_IPADDR 192.168.1.1
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#define CONFIG_SERVERIP 192.168.1.146
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#define HWCONFIG_DEFAULT \
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"hwconfig=rs232;" \
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"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
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"usb_pgood_delay=2000\0" \
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"console=ttymxc1\0" \
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"bootdevs=usb mmc sata flash\0" \
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HWCONFIG_DEFAULT \
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"video=\0" \
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\
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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\
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"fdt_high=0xffffffff\0" \
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"fdt_addr=0x18000000\0" \
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"initrd_high=0xffffffff\0" \
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"bootdir=boot\0" \
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"loadfdt=" \
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"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
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"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
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"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
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"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
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"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
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"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
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"fi\0" \
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\
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"script=6x_bootscript-ventana\0" \
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"loadscript=" \
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"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
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"source; " \
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"fi\0" \
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\
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"uimage=uImage\0" \
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"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
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"mmc_boot=" \
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"setenv fsload 'ext2load mmc 0:1'; " \
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"mmc dev 0 && mmc rescan && " \
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"setenv dtype mmc; run loadscript; " \
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"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
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"setenv bootargs console=${console},${baudrate} " \
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"root=/dev/mmcblk0p1 rootfstype=ext4 " \
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"rootwait rw ${video} ${extra}; " \
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"if run loadfdt && fdt addr ${fdt_addr}; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"bootm; " \
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"fi; " \
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"fi\0" \
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\
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"sata_boot=" \
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"setenv fsload 'ext2load sata 0:1'; sata init && " \
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"setenv dtype sata; run loadscript; " \
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"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
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"setenv bootargs console=${console},${baudrate} " \
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"root=/dev/sda1 rootfstype=ext4 " \
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"rootwait rw ${video} ${extra}; " \
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"if run loadfdt && fdt addr ${fdt_addr}; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"bootm; " \
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"fi; " \
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"fi\0" \
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"usb_boot=" \
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"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
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"setenv dtype usb; run loadscript; " \
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"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
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"setenv bootargs console=${console},${baudrate} " \
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"root=/dev/sda1 rootfstype=ext4 " \
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"rootwait rw ${video} ${extra}; " \
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"if run loadfdt && fdt addr ${fdt_addr}; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"bootm; " \
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"fi; " \
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"fi\0"
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#ifdef CONFIG_SPI_FLASH
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_EXTRA_ENV_SETTINGS_COMMON \
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"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
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"image_uboot=ventana/u-boot_spi.imx\0" \
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\
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"spi_koffset=0x90000\0" \
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"spi_klen=0x200000\0" \
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\
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"spi_updateuboot=echo Updating uboot from " \
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"${serverip}:${image_uboot}...; " \
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"tftpboot ${loadaddr} ${image_uboot} && " \
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"sf probe && sf erase 0 80000 && " \
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"sf write ${loadaddr} 400 ${filesize}\0" \
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"spi_update=echo Updating OS from ${serverip}:${image_os} " \
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"to ${spi_koffset} ...; " \
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"tftp ${loadaddr} ${image_os} && " \
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"sf probe && " \
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"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
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\
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"flash_boot=" \
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"if sf probe && " \
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"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
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"setenv bootargs console=${console},${baudrate} " \
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"root=/dev/mtdblock3 " \
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"rootfstype=squashfs,jffs2 " \
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"${video} ${extra}; " \
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"bootm; " \
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"fi\0"
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#else
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_EXTRA_ENV_SETTINGS_COMMON \
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\
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"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
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"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
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"tftp ${loadaddr} ${image_rootfs} && " \
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"nand erase.part rootfs && " \
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"nand write ${loadaddr} rootfs ${filesize}\0" \
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\
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"flash_boot=" \
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"setenv fsload 'ubifsload'; " \
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"ubi part rootfs; " \
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"if ubi check boot; then " \
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"ubifsmount ubi0:boot; " \
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"setenv root ubi0:rootfs ubi.mtd=2 " \
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"rootfstype=squashfs,ubifs; " \
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"setenv bootdir; " \
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"elif ubi check rootfs; then " \
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"ubifsmount ubi0:rootfs; " \
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"setenv root ubi0:rootfs ubi.mtd=2 " \
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"rootfstype=ubifs; " \
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"fi; " \
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"setenv dtype nand; run loadscript; " \
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"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
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"setenv bootargs console=${console},${baudrate} " \
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"root=${root} ${video} ${extra}; " \
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"if run loadfdt && fdt addr ${fdt_addr}; then " \
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"ubifsumount; " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"ubifsumount; bootm; " \
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"fi; " \
|
|
"fi\0"
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#endif
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|
|
#define CONFIG_BOOTCOMMAND \
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|
"for btype in ${bootdevs}; do " \
|
|
"echo; echo Attempting ${btype} boot...; " \
|
|
"if run ${btype}_boot; then; fi; " \
|
|
"done"
|
|
|
|
/* Device Tree Support */
|
|
#define CONFIG_FDT_FIXUP_PARTITIONS
|
|
|
|
#endif /* __CONFIG_H */
|