mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 02:20:25 +00:00
b71f9dca89
Adjust minnowmax to use driver model for PCI. This requires adding a device tree node to specify the ranges, removing the board-specific PCI code and ensuring that the host bridge is configured. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
141 lines
2.3 KiB
Text
141 lines
2.3 KiB
Text
/*
|
|
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/x86-gpio.h>
|
|
|
|
/include/ "skeleton.dtsi"
|
|
/include/ "serial.dtsi"
|
|
|
|
/ {
|
|
model = "Intel Minnowboard Max";
|
|
compatible = "intel,minnowmax", "intel,baytrail";
|
|
|
|
aliases {
|
|
serial0 = &serial;
|
|
spi0 = "/spi";
|
|
};
|
|
|
|
config {
|
|
silent_console = <0>;
|
|
};
|
|
|
|
pch_pinctrl {
|
|
compatible = "intel,x86-pinctrl";
|
|
io-base = <0x4c>;
|
|
|
|
pin_usb_host_en0@0 {
|
|
gpio-offset = <0x80 8>;
|
|
pad-offset = <0x260>;
|
|
mode-gpio;
|
|
output-value = <1>;
|
|
direction = <PIN_OUTPUT>;
|
|
};
|
|
|
|
pin_usb_host_en1@0 {
|
|
gpio-offset = <0x80 9>;
|
|
pad-offset = <0x258>;
|
|
mode-gpio;
|
|
output-value = <1>;
|
|
direction = <PIN_OUTPUT>;
|
|
};
|
|
};
|
|
|
|
gpioa {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0 0x20>;
|
|
bank-name = "A";
|
|
};
|
|
|
|
gpiob {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0x20 0x20>;
|
|
bank-name = "B";
|
|
};
|
|
|
|
gpioc {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0x40 0x20>;
|
|
bank-name = "C";
|
|
};
|
|
|
|
gpiod {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0x60 0x20>;
|
|
bank-name = "D";
|
|
};
|
|
|
|
gpioe {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0x80 0x20>;
|
|
bank-name = "E";
|
|
};
|
|
|
|
gpiof {
|
|
compatible = "intel,ich6-gpio";
|
|
u-boot,dm-pre-reloc;
|
|
reg = <0xA0 0x20>;
|
|
bank-name = "F";
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "/serial";
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "intel,baytrail-cpu";
|
|
reg = <0>;
|
|
intel,apic-id = <0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "intel,baytrail-cpu";
|
|
reg = <1>;
|
|
intel,apic-id = <4>;
|
|
};
|
|
|
|
};
|
|
|
|
pci {
|
|
compatible = "intel,pci-baytrail", "pci-x86";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
u-boot,dm-pre-reloc;
|
|
ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0 0x10000000
|
|
0x42000000 0x0 0xc0000000 0xc0000000 0 0x10000000
|
|
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
|
|
};
|
|
|
|
spi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "intel,ich-spi";
|
|
spi-flash@0 {
|
|
reg = <0>;
|
|
compatible = "stmicro,n25q064a", "spi-flash";
|
|
memory-map = <0xff800000 0x00800000>;
|
|
};
|
|
};
|
|
|
|
microcode {
|
|
update@0 {
|
|
#include "microcode/m0130673322.dtsi"
|
|
};
|
|
};
|
|
|
|
};
|