u-boot/board/t3corp/chip_config.c
Stefan Roese 5bf39a96c2 ppc4xx: T3CORP fixes and updates
This patch fixes some problems for the T3CORP board. Here the list
of the changes:

- Add 600-67 and 677 CPU frequency setting to chip_config
  command
- Define CONFIG_DDR_RFDC_FIXED on t3corp:
  While using the "normal" auto calibration code, sometimes values for
  RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
  upon relocation, while running from SDRAM). With this optimized RFDC
  value we can force this register and use the auto-calibration code to
  setup the remaining calibration registers.
- Increase sizes of FPGA chips selects
- EBC timing updated OEN=3 for 66 MHz EBC speed
- Change ext. IRQ2 setup to level-low active
- Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL

By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
chip busy status. This is now used instead of the data toggle method which
is used historically by default in the common CFI driver. With this change
a problem with not written data is solved on this board, where a 32 byte
block of data is still erased instead of filled with the correct content
after these commands:

=> erase 0xfc100000 +0x1000000

....................................................................
done
Erased 128 sectors
=> cp.b 0x100000 0xfc100000 0x1000000
Copy to Flash... done
=> cmp.b 0x100000 0xfc100000 0x1000000
byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
Total of 12637888 bytes were the same

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:53:48 +02:00

73 lines
2 KiB
C

/*
* (C) Copyright 2010
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
struct ppc4xx_config ppc4xx_config_val[] = {
{
"600-67", "CPU: 600 PLB: 200 OPB: 67 EBC: 67",
{
0x86, 0x80, 0xce, 0x1f, 0x7d, 0x80, 0x00, 0xe0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"600-100", "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"667", "CPU: 667 PLB: 166 OPB: 83 EBC: 83",
{
0x06, 0x80, 0xbb, 0x14, 0x99, 0x82, 0x00, 0xa0,
0x40, 0x88, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"800", "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1000", "CPU:1000 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1066", "CPU:1066 PLB: 266 OPB: 88 EBC: 88",
{
0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);