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920c6965d1
The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org>
1201 lines
30 KiB
C
1201 lines
30 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef USE_HOSTCC
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <serial.h>
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#include <libfdt.h>
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#include <fdtdec.h>
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#include <asm/sections.h>
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#include <linux/ctype.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Here are the type we know about. One day we might allow drivers to
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* register. For now we just put them here. The COMPAT macro allows us to
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* turn this into a sparse list later, and keeps the ID with the name.
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*
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* NOTE: This list is basically a TODO list for things that need to be
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* converted to driver model. So don't add new things here unless there is a
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* good reason why driver-model conversion is infeasible. Examples include
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* things which are used before driver model is available.
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*/
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#define COMPAT(id, name) name
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static const char * const compat_names[COMPAT_COUNT] = {
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COMPAT(UNKNOWN, "<none>"),
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COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
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COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
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COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
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COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
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COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
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COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
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COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
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COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
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COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
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COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
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COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
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COMPAT(SMSC_LAN9215, "smsc,lan9215"),
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COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
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COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
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COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
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COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
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COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
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COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
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COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
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COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
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COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
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COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
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COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
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COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
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COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
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COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
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COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
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COMPAT(INTEL_MICROCODE, "intel,microcode"),
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COMPAT(AMS_AS3722, "ams,as3722"),
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COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
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COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
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COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
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COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
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COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
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COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
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COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
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COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
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};
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const char *fdtdec_get_compatible(enum fdt_compat_id id)
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{
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/* We allow reading of the 'unknown' ID for testing purposes */
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assert(id >= 0 && id < COMPAT_COUNT);
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return compat_names[id];
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}
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fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
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const char *prop_name, int index, int na, int ns,
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fdt_size_t *sizep)
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{
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const fdt32_t *prop, *prop_end;
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const fdt32_t *prop_addr, *prop_size, *prop_after_size;
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int len;
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fdt_addr_t addr;
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debug("%s: %s: ", __func__, prop_name);
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if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
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debug("(na too large for fdt_addr_t type)\n");
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return FDT_ADDR_T_NONE;
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}
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if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
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debug("(ns too large for fdt_size_t type)\n");
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return FDT_ADDR_T_NONE;
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}
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prop = fdt_getprop(blob, node, prop_name, &len);
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if (!prop) {
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debug("(not found)\n");
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return FDT_ADDR_T_NONE;
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}
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prop_end = prop + (len / sizeof(*prop));
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prop_addr = prop + (index * (na + ns));
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prop_size = prop_addr + na;
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prop_after_size = prop_size + ns;
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if (prop_after_size > prop_end) {
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debug("(not enough data: expected >= %d cells, got %d cells)\n",
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(u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
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return FDT_ADDR_T_NONE;
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}
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addr = fdtdec_get_number(prop_addr, na);
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if (sizep) {
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*sizep = fdtdec_get_number(prop_size, ns);
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debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
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(unsigned long long)*sizep);
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} else {
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debug("addr=%08llx\n", (unsigned long long)addr);
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}
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return addr;
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}
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fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
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int node, const char *prop_name, int index, fdt_size_t *sizep)
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{
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int na, ns;
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debug("%s: ", __func__);
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na = fdt_address_cells(blob, parent);
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if (na < 1) {
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debug("(bad #address-cells)\n");
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return FDT_ADDR_T_NONE;
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}
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ns = fdt_size_cells(blob, parent);
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if (ns < 0) {
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debug("(bad #size-cells)\n");
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return FDT_ADDR_T_NONE;
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}
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debug("na=%d, ns=%d, ", na, ns);
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return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
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ns, sizep);
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}
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fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
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const char *prop_name, int index, fdt_size_t *sizep)
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{
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int parent;
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debug("%s: ", __func__);
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parent = fdt_parent_offset(blob, node);
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if (parent < 0) {
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debug("(no parent found)\n");
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return FDT_ADDR_T_NONE;
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}
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return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
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index, sizep);
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}
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fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
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const char *prop_name, fdt_size_t *sizep)
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{
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int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
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return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
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sizeof(fdt_addr_t) / sizeof(fdt32_t),
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ns, sizep);
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}
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fdt_addr_t fdtdec_get_addr(const void *blob, int node,
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const char *prop_name)
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{
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return fdtdec_get_addr_size(blob, node, prop_name, NULL);
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}
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#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
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int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
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const char *prop_name, struct fdt_pci_addr *addr)
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{
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const u32 *cell;
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int len;
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int ret = -ENOENT;
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debug("%s: %s: ", __func__, prop_name);
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/*
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* If we follow the pci bus bindings strictly, we should check
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* the value of the node's parent node's #address-cells and
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* #size-cells. They need to be 3 and 2 accordingly. However,
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* for simplicity we skip the check here.
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*/
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cell = fdt_getprop(blob, node, prop_name, &len);
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if (!cell)
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goto fail;
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if ((len % FDT_PCI_REG_SIZE) == 0) {
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int num = len / FDT_PCI_REG_SIZE;
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int i;
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for (i = 0; i < num; i++) {
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debug("pci address #%d: %08lx %08lx %08lx\n", i,
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(ulong)fdt32_to_cpu(cell[0]),
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(ulong)fdt32_to_cpu(cell[1]),
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(ulong)fdt32_to_cpu(cell[2]));
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if ((fdt32_to_cpu(*cell) & type) == type) {
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addr->phys_hi = fdt32_to_cpu(cell[0]);
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addr->phys_mid = fdt32_to_cpu(cell[1]);
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addr->phys_lo = fdt32_to_cpu(cell[1]);
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break;
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} else {
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cell += (FDT_PCI_ADDR_CELLS +
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FDT_PCI_SIZE_CELLS);
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}
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}
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if (i == num) {
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ret = -ENXIO;
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goto fail;
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}
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return 0;
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} else {
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ret = -EINVAL;
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}
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fail:
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debug("(not found)\n");
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return ret;
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}
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int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
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{
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const char *list, *end;
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int len;
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list = fdt_getprop(blob, node, "compatible", &len);
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if (!list)
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return -ENOENT;
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end = list + len;
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while (list < end) {
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char *s;
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len = strlen(list);
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if (len >= strlen("pciVVVV,DDDD")) {
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s = strstr(list, "pci");
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/*
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* check if the string is something like pciVVVV,DDDD.RR
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* or just pciVVVV,DDDD
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*/
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if (s && s[7] == ',' &&
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(s[12] == '.' || s[12] == 0)) {
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s += 3;
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*vendor = simple_strtol(s, NULL, 16);
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s += 5;
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*device = simple_strtol(s, NULL, 16);
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return 0;
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}
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}
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list += (len + 1);
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}
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return -ENOENT;
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}
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int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
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u32 *bar)
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{
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int barnum;
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/* extract the bar number from fdt_pci_addr */
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barnum = addr->phys_hi & 0xff;
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if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
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return -EINVAL;
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barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
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*bar = dm_pci_read_bar32(dev, barnum);
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return 0;
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}
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#endif
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uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
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uint64_t default_val)
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{
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const uint64_t *cell64;
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int length;
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cell64 = fdt_getprop(blob, node, prop_name, &length);
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if (!cell64 || length < sizeof(*cell64))
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return default_val;
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return fdt64_to_cpu(*cell64);
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}
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int fdtdec_get_is_enabled(const void *blob, int node)
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{
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const char *cell;
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/*
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* It should say "okay", so only allow that. Some fdts use "ok" but
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* this is a bug. Please fix your device tree source file. See here
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* for discussion:
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*
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* http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
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*/
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cell = fdt_getprop(blob, node, "status", NULL);
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if (cell)
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return 0 == strcmp(cell, "okay");
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return 1;
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}
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enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
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{
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enum fdt_compat_id id;
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/* Search our drivers */
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for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
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if (0 == fdt_node_check_compatible(blob, node,
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compat_names[id]))
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return id;
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return COMPAT_UNKNOWN;
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}
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int fdtdec_next_compatible(const void *blob, int node,
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enum fdt_compat_id id)
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{
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return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
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}
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int fdtdec_next_compatible_subnode(const void *blob, int node,
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enum fdt_compat_id id, int *depthp)
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{
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do {
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node = fdt_next_node(blob, node, depthp);
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} while (*depthp > 1);
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/* If this is a direct subnode, and compatible, return it */
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if (*depthp == 1 && 0 == fdt_node_check_compatible(
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blob, node, compat_names[id]))
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return node;
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return -FDT_ERR_NOTFOUND;
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}
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int fdtdec_next_alias(const void *blob, const char *name,
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enum fdt_compat_id id, int *upto)
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{
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#define MAX_STR_LEN 20
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char str[MAX_STR_LEN + 20];
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int node, err;
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/* snprintf() is not available */
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assert(strlen(name) < MAX_STR_LEN);
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sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
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node = fdt_path_offset(blob, str);
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if (node < 0)
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return node;
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err = fdt_node_check_compatible(blob, node, compat_names[id]);
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if (err < 0)
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return err;
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if (err)
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return -FDT_ERR_NOTFOUND;
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(*upto)++;
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return node;
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}
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int fdtdec_find_aliases_for_id(const void *blob, const char *name,
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enum fdt_compat_id id, int *node_list, int maxcount)
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{
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memset(node_list, '\0', sizeof(*node_list) * maxcount);
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return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
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}
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/* TODO: Can we tighten this code up a little? */
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int fdtdec_add_aliases_for_id(const void *blob, const char *name,
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enum fdt_compat_id id, int *node_list, int maxcount)
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{
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int name_len = strlen(name);
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int nodes[maxcount];
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int num_found = 0;
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int offset, node;
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int alias_node;
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int count;
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int i, j;
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/* find the alias node if present */
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alias_node = fdt_path_offset(blob, "/aliases");
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/*
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* start with nothing, and we can assume that the root node can't
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* match
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*/
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memset(nodes, '\0', sizeof(nodes));
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/* First find all the compatible nodes */
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for (node = count = 0; node >= 0 && count < maxcount;) {
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node = fdtdec_next_compatible(blob, node, id);
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if (node >= 0)
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nodes[count++] = node;
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}
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if (node >= 0)
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debug("%s: warning: maxcount exceeded with alias '%s'\n",
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__func__, name);
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/* Now find all the aliases */
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for (offset = fdt_first_property_offset(blob, alias_node);
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offset > 0;
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offset = fdt_next_property_offset(blob, offset)) {
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const struct fdt_property *prop;
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const char *path;
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int number;
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int found;
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node = 0;
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prop = fdt_get_property_by_offset(blob, offset, NULL);
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path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
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if (prop->len && 0 == strncmp(path, name, name_len))
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node = fdt_path_offset(blob, prop->data);
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if (node <= 0)
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continue;
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/* Get the alias number */
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number = simple_strtoul(path + name_len, NULL, 10);
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if (number < 0 || number >= maxcount) {
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debug("%s: warning: alias '%s' is out of range\n",
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__func__, path);
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continue;
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}
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/* Make sure the node we found is actually in our list! */
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found = -1;
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for (j = 0; j < count; j++)
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if (nodes[j] == node) {
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found = j;
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break;
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}
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if (found == -1) {
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debug("%s: warning: alias '%s' points to a node "
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"'%s' that is missing or is not compatible "
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" with '%s'\n", __func__, path,
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fdt_get_name(blob, node, NULL),
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compat_names[id]);
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continue;
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}
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/*
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* Add this node to our list in the right place, and mark
|
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* it as done.
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*/
|
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if (fdtdec_get_is_enabled(blob, node)) {
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if (node_list[number]) {
|
|
debug("%s: warning: alias '%s' requires that "
|
|
"a node be placed in the list in a "
|
|
"position which is already filled by "
|
|
"node '%s'\n", __func__, path,
|
|
fdt_get_name(blob, node, NULL));
|
|
continue;
|
|
}
|
|
node_list[number] = node;
|
|
if (number >= num_found)
|
|
num_found = number + 1;
|
|
}
|
|
nodes[found] = 0;
|
|
}
|
|
|
|
/* Add any nodes not mentioned by an alias */
|
|
for (i = j = 0; i < maxcount; i++) {
|
|
if (!node_list[i]) {
|
|
for (; j < maxcount; j++)
|
|
if (nodes[j] &&
|
|
fdtdec_get_is_enabled(blob, nodes[j]))
|
|
break;
|
|
|
|
/* Have we run out of nodes to add? */
|
|
if (j == maxcount)
|
|
break;
|
|
|
|
assert(!node_list[i]);
|
|
node_list[i] = nodes[j++];
|
|
if (i >= num_found)
|
|
num_found = i + 1;
|
|
}
|
|
}
|
|
|
|
return num_found;
|
|
}
|
|
|
|
int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
|
|
int *seqp)
|
|
{
|
|
int base_len = strlen(base);
|
|
const char *find_name;
|
|
int find_namelen;
|
|
int prop_offset;
|
|
int aliases;
|
|
|
|
find_name = fdt_get_name(blob, offset, &find_namelen);
|
|
debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
|
|
|
|
aliases = fdt_path_offset(blob, "/aliases");
|
|
for (prop_offset = fdt_first_property_offset(blob, aliases);
|
|
prop_offset > 0;
|
|
prop_offset = fdt_next_property_offset(blob, prop_offset)) {
|
|
const char *prop;
|
|
const char *name;
|
|
const char *slash;
|
|
int len, val;
|
|
|
|
prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
|
|
debug(" - %s, %s\n", name, prop);
|
|
if (len < find_namelen || *prop != '/' || prop[len - 1] ||
|
|
strncmp(name, base, base_len))
|
|
continue;
|
|
|
|
slash = strrchr(prop, '/');
|
|
if (strcmp(slash + 1, find_name))
|
|
continue;
|
|
val = trailing_strtol(name);
|
|
if (val != -1) {
|
|
*seqp = val;
|
|
debug("Found seq %d\n", *seqp);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
debug("Not found\n");
|
|
return -ENOENT;
|
|
}
|
|
|
|
const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
|
|
{
|
|
int chosen_node;
|
|
|
|
if (!blob)
|
|
return NULL;
|
|
chosen_node = fdt_path_offset(blob, "/chosen");
|
|
return fdt_getprop(blob, chosen_node, name, NULL);
|
|
}
|
|
|
|
int fdtdec_get_chosen_node(const void *blob, const char *name)
|
|
{
|
|
const char *prop;
|
|
|
|
prop = fdtdec_get_chosen_prop(blob, name);
|
|
if (!prop)
|
|
return -FDT_ERR_NOTFOUND;
|
|
return fdt_path_offset(blob, prop);
|
|
}
|
|
|
|
int fdtdec_check_fdt(void)
|
|
{
|
|
/*
|
|
* We must have an FDT, but we cannot panic() yet since the console
|
|
* is not ready. So for now, just assert(). Boards which need an early
|
|
* FDT (prior to console ready) will need to make their own
|
|
* arrangements and do their own checks.
|
|
*/
|
|
assert(!fdtdec_prepare_fdt());
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This function is a little odd in that it accesses global data. At some
|
|
* point if the architecture board.c files merge this will make more sense.
|
|
* Even now, it is common code.
|
|
*/
|
|
int fdtdec_prepare_fdt(void)
|
|
{
|
|
if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
|
|
fdt_check_header(gd->fdt_blob)) {
|
|
#ifdef CONFIG_SPL_BUILD
|
|
puts("Missing DTB\n");
|
|
#else
|
|
puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
|
|
# ifdef DEBUG
|
|
if (gd->fdt_blob) {
|
|
printf("fdt_blob=%p\n", gd->fdt_blob);
|
|
print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
|
|
32, 0);
|
|
}
|
|
# endif
|
|
#endif
|
|
return -1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
|
|
{
|
|
const u32 *phandle;
|
|
int lookup;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
phandle = fdt_getprop(blob, node, prop_name, NULL);
|
|
if (!phandle)
|
|
return -FDT_ERR_NOTFOUND;
|
|
|
|
lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
|
|
return lookup;
|
|
}
|
|
|
|
/**
|
|
* Look up a property in a node and check that it has a minimum length.
|
|
*
|
|
* @param blob FDT blob
|
|
* @param node node to examine
|
|
* @param prop_name name of property to find
|
|
* @param min_len minimum property length in bytes
|
|
* @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
|
|
found, or -FDT_ERR_BADLAYOUT if not enough data
|
|
* @return pointer to cell, which is only valid if err == 0
|
|
*/
|
|
static const void *get_prop_check_min_len(const void *blob, int node,
|
|
const char *prop_name, int min_len, int *err)
|
|
{
|
|
const void *cell;
|
|
int len;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
if (!cell)
|
|
*err = -FDT_ERR_NOTFOUND;
|
|
else if (len < min_len)
|
|
*err = -FDT_ERR_BADLAYOUT;
|
|
else
|
|
*err = 0;
|
|
return cell;
|
|
}
|
|
|
|
int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
|
|
u32 *array, int count)
|
|
{
|
|
const u32 *cell;
|
|
int i, err = 0;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = get_prop_check_min_len(blob, node, prop_name,
|
|
sizeof(u32) * count, &err);
|
|
if (!err) {
|
|
for (i = 0; i < count; i++)
|
|
array[i] = fdt32_to_cpu(cell[i]);
|
|
}
|
|
return err;
|
|
}
|
|
|
|
int fdtdec_get_int_array_count(const void *blob, int node,
|
|
const char *prop_name, u32 *array, int count)
|
|
{
|
|
const u32 *cell;
|
|
int len, elems;
|
|
int i;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
if (!cell)
|
|
return -FDT_ERR_NOTFOUND;
|
|
elems = len / sizeof(u32);
|
|
if (count > elems)
|
|
count = elems;
|
|
for (i = 0; i < count; i++)
|
|
array[i] = fdt32_to_cpu(cell[i]);
|
|
|
|
return count;
|
|
}
|
|
|
|
const u32 *fdtdec_locate_array(const void *blob, int node,
|
|
const char *prop_name, int count)
|
|
{
|
|
const u32 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name,
|
|
sizeof(u32) * count, &err);
|
|
return err ? NULL : cell;
|
|
}
|
|
|
|
int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
|
|
{
|
|
const s32 *cell;
|
|
int len;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
return cell != NULL;
|
|
}
|
|
|
|
int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
|
|
const char *list_name,
|
|
const char *cells_name,
|
|
int cell_count, int index,
|
|
struct fdtdec_phandle_args *out_args)
|
|
{
|
|
const __be32 *list, *list_end;
|
|
int rc = 0, size, cur_index = 0;
|
|
uint32_t count = 0;
|
|
int node = -1;
|
|
int phandle;
|
|
|
|
/* Retrieve the phandle list property */
|
|
list = fdt_getprop(blob, src_node, list_name, &size);
|
|
if (!list)
|
|
return -ENOENT;
|
|
list_end = list + size / sizeof(*list);
|
|
|
|
/* Loop over the phandles until all the requested entry is found */
|
|
while (list < list_end) {
|
|
rc = -EINVAL;
|
|
count = 0;
|
|
|
|
/*
|
|
* If phandle is 0, then it is an empty entry with no
|
|
* arguments. Skip forward to the next entry.
|
|
*/
|
|
phandle = be32_to_cpup(list++);
|
|
if (phandle) {
|
|
/*
|
|
* Find the provider node and parse the #*-cells
|
|
* property to determine the argument length.
|
|
*
|
|
* This is not needed if the cell count is hard-coded
|
|
* (i.e. cells_name not set, but cell_count is set),
|
|
* except when we're going to return the found node
|
|
* below.
|
|
*/
|
|
if (cells_name || cur_index == index) {
|
|
node = fdt_node_offset_by_phandle(blob,
|
|
phandle);
|
|
if (!node) {
|
|
debug("%s: could not find phandle\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL));
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
if (cells_name) {
|
|
count = fdtdec_get_int(blob, node, cells_name,
|
|
-1);
|
|
if (count == -1) {
|
|
debug("%s: could not get %s for %s\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL),
|
|
cells_name,
|
|
fdt_get_name(blob, node,
|
|
NULL));
|
|
goto err;
|
|
}
|
|
} else {
|
|
count = cell_count;
|
|
}
|
|
|
|
/*
|
|
* Make sure that the arguments actually fit in the
|
|
* remaining property data length
|
|
*/
|
|
if (list + count > list_end) {
|
|
debug("%s: arguments longer than property\n",
|
|
fdt_get_name(blob, src_node, NULL));
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* All of the error cases above bail out of the loop, so at
|
|
* this point, the parsing is successful. If the requested
|
|
* index matches, then fill the out_args structure and return,
|
|
* or return -ENOENT for an empty entry.
|
|
*/
|
|
rc = -ENOENT;
|
|
if (cur_index == index) {
|
|
if (!phandle)
|
|
goto err;
|
|
|
|
if (out_args) {
|
|
int i;
|
|
|
|
if (count > MAX_PHANDLE_ARGS) {
|
|
debug("%s: too many arguments %d\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL), count);
|
|
count = MAX_PHANDLE_ARGS;
|
|
}
|
|
out_args->node = node;
|
|
out_args->args_count = count;
|
|
for (i = 0; i < count; i++) {
|
|
out_args->args[i] =
|
|
be32_to_cpup(list++);
|
|
}
|
|
}
|
|
|
|
/* Found it! return success */
|
|
return 0;
|
|
}
|
|
|
|
node = -1;
|
|
list += count;
|
|
cur_index++;
|
|
}
|
|
|
|
/*
|
|
* Result will be one of:
|
|
* -ENOENT : index is for empty phandle
|
|
* -EINVAL : parsing error on data
|
|
* [1..n] : Number of phandle (count mode; when index = -1)
|
|
*/
|
|
rc = index < 0 ? cur_index : -ENOENT;
|
|
err:
|
|
return rc;
|
|
}
|
|
|
|
int fdtdec_get_child_count(const void *blob, int node)
|
|
{
|
|
int subnode;
|
|
int num = 0;
|
|
|
|
fdt_for_each_subnode(blob, subnode, node)
|
|
num++;
|
|
|
|
return num;
|
|
}
|
|
|
|
int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
|
|
u8 *array, int count)
|
|
{
|
|
const u8 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
|
|
if (!err)
|
|
memcpy(array, cell, count);
|
|
return err;
|
|
}
|
|
|
|
const u8 *fdtdec_locate_byte_array(const void *blob, int node,
|
|
const char *prop_name, int count)
|
|
{
|
|
const u8 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
|
|
if (err)
|
|
return NULL;
|
|
return cell;
|
|
}
|
|
|
|
int fdtdec_get_config_int(const void *blob, const char *prop_name,
|
|
int default_val)
|
|
{
|
|
int config_node;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
config_node = fdt_path_offset(blob, "/config");
|
|
if (config_node < 0)
|
|
return default_val;
|
|
return fdtdec_get_int(blob, config_node, prop_name, default_val);
|
|
}
|
|
|
|
int fdtdec_get_config_bool(const void *blob, const char *prop_name)
|
|
{
|
|
int config_node;
|
|
const void *prop;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
config_node = fdt_path_offset(blob, "/config");
|
|
if (config_node < 0)
|
|
return 0;
|
|
prop = fdt_get_property(blob, config_node, prop_name, NULL);
|
|
|
|
return prop != NULL;
|
|
}
|
|
|
|
char *fdtdec_get_config_string(const void *blob, const char *prop_name)
|
|
{
|
|
const char *nodep;
|
|
int nodeoffset;
|
|
int len;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
nodeoffset = fdt_path_offset(blob, "/config");
|
|
if (nodeoffset < 0)
|
|
return NULL;
|
|
|
|
nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
|
|
if (!nodep)
|
|
return NULL;
|
|
|
|
return (char *)nodep;
|
|
}
|
|
|
|
int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
|
|
fdt_addr_t *basep, fdt_size_t *sizep)
|
|
{
|
|
const fdt_addr_t *cell;
|
|
int len;
|
|
|
|
debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
|
|
prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
|
|
debug("cell=%p, len=%d\n", cell, len);
|
|
return -1;
|
|
}
|
|
|
|
*basep = fdt_addr_to_cpu(*cell);
|
|
*sizep = fdt_size_to_cpu(cell[1]);
|
|
debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
|
|
(ulong)*sizep);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Read a flash entry from the fdt
|
|
*
|
|
* @param blob FDT blob
|
|
* @param node Offset of node to read
|
|
* @param name Name of node being read
|
|
* @param entry Place to put offset and size of this node
|
|
* @return 0 if ok, -ve on error
|
|
*/
|
|
int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
|
|
struct fmap_entry *entry)
|
|
{
|
|
const char *prop;
|
|
u32 reg[2];
|
|
|
|
if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
|
|
debug("Node '%s' has bad/missing 'reg' property\n", name);
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
entry->offset = reg[0];
|
|
entry->length = reg[1];
|
|
entry->used = fdtdec_get_int(blob, node, "used", entry->length);
|
|
prop = fdt_getprop(blob, node, "compress", NULL);
|
|
entry->compress_algo = prop && !strcmp(prop, "lzo") ?
|
|
FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
|
|
prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
|
|
entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
|
|
entry->hash = (uint8_t *)prop;
|
|
|
|
return 0;
|
|
}
|
|
|
|
u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
|
|
{
|
|
u64 number = 0;
|
|
|
|
while (cells--)
|
|
number = (number << 32) | fdt32_to_cpu(*ptr++);
|
|
|
|
return number;
|
|
}
|
|
|
|
int fdt_get_resource(const void *fdt, int node, const char *property,
|
|
unsigned int index, struct fdt_resource *res)
|
|
{
|
|
const fdt32_t *ptr, *end;
|
|
int na, ns, len, parent;
|
|
unsigned int i = 0;
|
|
|
|
parent = fdt_parent_offset(fdt, node);
|
|
if (parent < 0)
|
|
return parent;
|
|
|
|
na = fdt_address_cells(fdt, parent);
|
|
ns = fdt_size_cells(fdt, parent);
|
|
|
|
ptr = fdt_getprop(fdt, node, property, &len);
|
|
if (!ptr)
|
|
return len;
|
|
|
|
end = ptr + len / sizeof(*ptr);
|
|
|
|
while (ptr + na + ns <= end) {
|
|
if (i == index) {
|
|
res->start = res->end = fdtdec_get_number(ptr, na);
|
|
res->end += fdtdec_get_number(&ptr[na], ns) - 1;
|
|
return 0;
|
|
}
|
|
|
|
ptr += na + ns;
|
|
i++;
|
|
}
|
|
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
int fdt_get_named_resource(const void *fdt, int node, const char *property,
|
|
const char *prop_names, const char *name,
|
|
struct fdt_resource *res)
|
|
{
|
|
int index;
|
|
|
|
index = fdt_find_string(fdt, node, prop_names, name);
|
|
if (index < 0)
|
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return index;
|
|
|
|
return fdt_get_resource(fdt, node, property, index, res);
|
|
}
|
|
|
|
int fdtdec_decode_memory_region(const void *blob, int config_node,
|
|
const char *mem_type, const char *suffix,
|
|
fdt_addr_t *basep, fdt_size_t *sizep)
|
|
{
|
|
char prop_name[50];
|
|
const char *mem;
|
|
fdt_size_t size, offset_size;
|
|
fdt_addr_t base, offset;
|
|
int node;
|
|
|
|
if (config_node == -1) {
|
|
config_node = fdt_path_offset(blob, "/config");
|
|
if (config_node < 0) {
|
|
debug("%s: Cannot find /config node\n", __func__);
|
|
return -ENOENT;
|
|
}
|
|
}
|
|
if (!suffix)
|
|
suffix = "";
|
|
|
|
snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
|
|
suffix);
|
|
mem = fdt_getprop(blob, config_node, prop_name, NULL);
|
|
if (!mem) {
|
|
debug("%s: No memory type for '%s', using /memory\n", __func__,
|
|
prop_name);
|
|
mem = "/memory";
|
|
}
|
|
|
|
node = fdt_path_offset(blob, mem);
|
|
if (node < 0) {
|
|
debug("%s: Failed to find node '%s': %s\n", __func__, mem,
|
|
fdt_strerror(node));
|
|
return -ENOENT;
|
|
}
|
|
|
|
/*
|
|
* Not strictly correct - the memory may have multiple banks. We just
|
|
* use the first
|
|
*/
|
|
if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
|
|
debug("%s: Failed to decode memory region %s\n", __func__,
|
|
mem);
|
|
return -EINVAL;
|
|
}
|
|
|
|
snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
|
|
suffix);
|
|
if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
|
|
&offset_size)) {
|
|
debug("%s: Failed to decode memory region '%s'\n", __func__,
|
|
prop_name);
|
|
return -EINVAL;
|
|
}
|
|
|
|
*basep = base + offset;
|
|
*sizep = offset_size;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int decode_timing_property(const void *blob, int node, const char *name,
|
|
struct timing_entry *result)
|
|
{
|
|
int length, ret = 0;
|
|
const u32 *prop;
|
|
|
|
prop = fdt_getprop(blob, node, name, &length);
|
|
if (!prop) {
|
|
debug("%s: could not find property %s\n",
|
|
fdt_get_name(blob, node, NULL), name);
|
|
return length;
|
|
}
|
|
|
|
if (length == sizeof(u32)) {
|
|
result->typ = fdtdec_get_int(blob, node, name, 0);
|
|
result->min = result->typ;
|
|
result->max = result->typ;
|
|
} else {
|
|
ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
int fdtdec_decode_display_timing(const void *blob, int parent, int index,
|
|
struct display_timing *dt)
|
|
{
|
|
int i, node, timings_node;
|
|
u32 val = 0;
|
|
int ret = 0;
|
|
|
|
timings_node = fdt_subnode_offset(blob, parent, "display-timings");
|
|
if (timings_node < 0)
|
|
return timings_node;
|
|
|
|
for (i = 0, node = fdt_first_subnode(blob, timings_node);
|
|
node > 0 && i != index;
|
|
node = fdt_next_subnode(blob, node))
|
|
i++;
|
|
|
|
if (node < 0)
|
|
return node;
|
|
|
|
memset(dt, 0, sizeof(*dt));
|
|
|
|
ret |= decode_timing_property(blob, node, "hback-porch",
|
|
&dt->hback_porch);
|
|
ret |= decode_timing_property(blob, node, "hfront-porch",
|
|
&dt->hfront_porch);
|
|
ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
|
|
ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
|
|
ret |= decode_timing_property(blob, node, "vback-porch",
|
|
&dt->vback_porch);
|
|
ret |= decode_timing_property(blob, node, "vfront-porch",
|
|
&dt->vfront_porch);
|
|
ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
|
|
ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
|
|
ret |= decode_timing_property(blob, node, "clock-frequency",
|
|
&dt->pixelclock);
|
|
|
|
dt->flags = 0;
|
|
val = fdtdec_get_int(blob, node, "vsync-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
|
|
DISPLAY_FLAGS_VSYNC_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "hsync-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
|
|
DISPLAY_FLAGS_HSYNC_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "de-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
|
|
DISPLAY_FLAGS_DE_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
|
|
DISPLAY_FLAGS_PIXDATA_NEGEDGE;
|
|
}
|
|
|
|
if (fdtdec_get_bool(blob, node, "interlaced"))
|
|
dt->flags |= DISPLAY_FLAGS_INTERLACED;
|
|
if (fdtdec_get_bool(blob, node, "doublescan"))
|
|
dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
|
|
if (fdtdec_get_bool(blob, node, "doubleclk"))
|
|
dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
|
|
|
|
return ret;
|
|
}
|
|
|
|
int fdtdec_setup(void)
|
|
{
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
|
# ifdef CONFIG_OF_EMBED
|
|
/* Get a pointer to the FDT */
|
|
gd->fdt_blob = __dtb_dt_begin;
|
|
# elif defined CONFIG_OF_SEPARATE
|
|
# ifdef CONFIG_SPL_BUILD
|
|
/* FDT is at end of BSS unless it is in a different memory region */
|
|
if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
|
|
gd->fdt_blob = (ulong *)&_image_binary_end;
|
|
else
|
|
gd->fdt_blob = (ulong *)&__bss_end;
|
|
# else
|
|
/* FDT is at end of image */
|
|
gd->fdt_blob = (ulong *)&_end;
|
|
# endif
|
|
# elif defined(CONFIG_OF_HOSTFILE)
|
|
if (sandbox_read_fdt_from_file()) {
|
|
puts("Failed to read control FDT\n");
|
|
return -1;
|
|
}
|
|
# endif
|
|
# ifndef CONFIG_SPL_BUILD
|
|
/* Allow the early environment to override the fdt address */
|
|
gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
|
|
(uintptr_t)gd->fdt_blob);
|
|
# endif
|
|
#endif
|
|
return fdtdec_prepare_fdt();
|
|
}
|
|
|
|
#endif /* !USE_HOSTCC */
|