Becky Bruce 7ea3871e06 MPC8xxx DDR: align informational prints ... Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-01-14 01:32:19 -06:00
..
ddr.c	fsl-ddr: use the 1T timing as default configuration	2009-01-23 17:03:14 -06:00
law.c	ppc/85xx: Clean up use of LAWAR defines	2009-09-24 12:04:58 -05:00
Makefile	Switch from archive libraries to partial linking	2010-11-17 21:02:18 +01:00
mpc8560ads.c	MPC8xxx DDR: align informational prints	2011-01-14 01:32:19 -06:00
tlb.c	mpc85xx boards: initdram() cleanup/bugfix	2011-01-14 01:32:19 -06:00