u-boot/arch/powerpc
York Sun d8556db1d4 powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff
When chip select interleaving is enabled, cs0_bnds is used for address
binding. Other csn_bnds are not used. When two controllers interleaving is
enabled, cs0_bnds of both controllers are used, other csn_bnds are not.
However, the unused csn_bnds may be used internally for calculating
addresses for calibration. Setting those registers to 0 may confuse
controllers in some cases. Instead, setting them to 0xffffffff together
with normal LAWs will guarantee the address is not mapped to DDR.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09 12:41:39 -07:00
..
cpu powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff 2013-08-09 12:41:39 -07:00
include/asm powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file 2013-08-09 12:41:38 -07:00
lib Merge branch 'master' of git://git.denx.de/u-boot-i2c 2013-07-24 09:50:24 -04:00
config.mk Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00