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f91ba0ecbc
-VSC8662 is Dual Port 10/100/1000Base-T Phy, 100Base-FX/1000/Base-X Gigabit Ethernt Transceiver Phy. -Its register set and features are similar to other Vitesse Phys Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
252 lines
6.6 KiB
C
252 lines
6.6 KiB
C
/*
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* Vitesse PHY drivers
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*
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* Copyright 2010-2012 Freescale Semiconductor, Inc.
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* Author: Andy Fleming
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* Add vsc8662 phy support - Priyanka Jain
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <miiphy.h>
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/* Cicada Auxiliary Control/Status Register */
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#define MIIM_CIS82xx_AUX_CONSTAT 0x1c
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#define MIIM_CIS82xx_AUXCONSTAT_INIT 0x0004
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#define MIIM_CIS82xx_AUXCONSTAT_DUPLEX 0x0020
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#define MIIM_CIS82xx_AUXCONSTAT_SPEED 0x0018
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#define MIIM_CIS82xx_AUXCONSTAT_GBIT 0x0010
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#define MIIM_CIS82xx_AUXCONSTAT_100 0x0008
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/* Cicada Extended Control Register 1 */
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#define MIIM_CIS82xx_EXT_CON1 0x17
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#define MIIM_CIS8201_EXTCON1_INIT 0x0000
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/* Cicada 8204 Extended PHY Control Register 1 */
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#define MIIM_CIS8204_EPHY_CON 0x17
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#define MIIM_CIS8204_EPHYCON_INIT 0x0006
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#define MIIM_CIS8204_EPHYCON_RGMII 0x1100
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/* Cicada 8204 Serial LED Control Register */
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#define MIIM_CIS8204_SLED_CON 0x1b
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#define MIIM_CIS8204_SLEDCON_INIT 0x1115
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/* Vitesse VSC8601 Extended PHY Control Register 1 */
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#define MIIM_VSC8601_EPHY_CON 0x17
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#define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120
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#define MIIM_VSC8601_SKEW_CTRL 0x1c
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#define PHY_EXT_PAGE_ACCESS 0x1f
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/* CIS8201 */
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static int vitesse_config(struct phy_device *phydev)
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{
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/* Override PHY config settings */
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT,
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MIIM_CIS82xx_AUXCONSTAT_INIT);
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/* Set up the interface mode */
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_EXT_CON1,
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MIIM_CIS8201_EXTCON1_INIT);
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genphy_config_aneg(phydev);
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return 0;
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}
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static int vitesse_parse_status(struct phy_device *phydev)
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{
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int speed;
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int mii_reg;
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT);
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if (mii_reg & MIIM_CIS82xx_AUXCONSTAT_DUPLEX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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speed = mii_reg & MIIM_CIS82xx_AUXCONSTAT_SPEED;
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switch (speed) {
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case MIIM_CIS82xx_AUXCONSTAT_GBIT:
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phydev->speed = SPEED_1000;
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break;
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case MIIM_CIS82xx_AUXCONSTAT_100:
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phydev->speed = SPEED_100;
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break;
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default:
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phydev->speed = SPEED_10;
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break;
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}
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return 0;
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}
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static int vitesse_startup(struct phy_device *phydev)
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{
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genphy_update_link(phydev);
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vitesse_parse_status(phydev);
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return 0;
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}
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static int cis8204_config(struct phy_device *phydev)
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{
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/* Override PHY config settings */
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT,
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MIIM_CIS82xx_AUXCONSTAT_INIT);
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genphy_config_aneg(phydev);
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if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID))
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON,
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MIIM_CIS8204_EPHYCON_INIT |
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MIIM_CIS8204_EPHYCON_RGMII);
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else
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON,
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MIIM_CIS8204_EPHYCON_INIT);
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return 0;
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}
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/* Vitesse VSC8601 */
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int vsc8601_config(struct phy_device *phydev)
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{
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/* Configure some basic stuff */
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#ifdef CONFIG_SYS_VSC8601_SKEWFIX
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8601_EPHY_CON,
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MIIM_VSC8601_EPHY_CON_INIT_SKEW);
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#if defined(CONFIG_SYS_VSC8601_SKEW_TX) && defined(CONFIG_SYS_VSC8601_SKEW_RX)
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phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 1);
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#define VSC8101_SKEW \
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((CONFIG_SYS_VSC8601_SKEW_TX << 14) \
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| (CONFIG_SYS_VSC8601_SKEW_RX << 12))
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phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8601_SKEW_CTRL,
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VSC8101_SKEW);
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phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0);
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#endif
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#endif
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genphy_config_aneg(phydev);
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return 0;
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}
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static struct phy_driver VSC8211_driver = {
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.name = "Vitesse VSC8211",
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.uid = 0xfc4b0,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &vitesse_config,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8221_driver = {
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.name = "Vitesse VSC8221",
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.uid = 0xfc550,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8244_driver = {
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.name = "Vitesse VSC8244",
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.uid = 0xfc6c0,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8234_driver = {
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.name = "Vitesse VSC8234",
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.uid = 0xfc620,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8601_driver = {
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.name = "Vitesse VSC8601",
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.uid = 0x70420,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &vsc8601_config,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8641_driver = {
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.name = "Vitesse VSC8641",
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.uid = 0x70430,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver VSC8662_driver = {
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.name = "Vitesse VSC8662",
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.uid = 0x70660,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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/* Vitesse bought Cicada, so we'll put these here */
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static struct phy_driver cis8201_driver = {
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.name = "CIS8201",
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.uid = 0xfc410,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &vitesse_config,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver cis8204_driver = {
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.name = "Cicada Cis8204",
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.uid = 0xfc440,
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.mask = 0xffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &cis8204_config,
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.startup = &vitesse_startup,
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.shutdown = &genphy_shutdown,
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};
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int phy_vitesse_init(void)
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{
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phy_register(&VSC8641_driver);
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phy_register(&VSC8601_driver);
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phy_register(&VSC8234_driver);
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phy_register(&VSC8244_driver);
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phy_register(&VSC8211_driver);
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phy_register(&VSC8221_driver);
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phy_register(&VSC8662_driver);
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phy_register(&cis8201_driver);
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phy_register(&cis8204_driver);
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return 0;
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}
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