mirror of
https://github.com/AsahiLinux/u-boot
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20 lines
905 B
Makefile
20 lines
905 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2016 Cadence Design Systems Inc.
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obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
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obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
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obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
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obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
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obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
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obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
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obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
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obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
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obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
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obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
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obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
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obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
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obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
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obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
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obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
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obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
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