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MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
57 lines
1.4 KiB
Text
57 lines
1.4 KiB
Text
if TARGET_MICROBLAZE_GENERIC
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config SYS_BOARD
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default "microblaze-generic"
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config SYS_VENDOR
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default "xilinx"
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config SYS_CONFIG_NAME
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string "Board configuration name"
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default "microblaze-generic"
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help
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This option contains information about board configuration name.
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Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
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will be used for board configuration.
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config XILINX_MICROBLAZE0_USE_MSR_INSTR
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int "USE_MSR_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_PCMP_INSTR
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int "USE_PCMP_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_BARREL
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int "USE_BARREL range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_DIV
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int "USE_DIV range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_HW_MUL
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int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
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default 0
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config XILINX_MICROBLAZE0_HW_VER
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string "Core version number"
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default "7.10.d"
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config XILINX_MICROBLAZE0_USR_EXCEP
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bool "MicroBlaze user exception support"
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default y
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help
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Enable this option in order to install the user exception handler
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(_exception_handler routine from arch/microblaze/cpu/exception.c) in
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the exception vector table. The user exception vector is located at
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C_BASE_VECTORS + 0x8 address.
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config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
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hex "Location of MicroBlaze vectors"
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default 0x0
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help
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Memory address location of the exception vector table. It is
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configurable via the C_BASE_VECTORS hdl parameter.
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endif
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