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https://github.com/AsahiLinux/u-boot
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72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/*
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* Copyright 2008 Extreme Engineering Solutions, Inc.
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* Copyright 2007-2008 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/fsl_pci.h>
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#include <asm/fsl_serdes.h>
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#include <asm/io.h>
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#include <linux/compiler.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#ifdef CONFIG_PCI1
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static struct pci_controller pci1_hose;
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#endif
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void pci_init_board(void)
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{
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int first_free_busno = 0;
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#ifdef CONFIG_PCI1
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int pcie_ep;
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struct fsl_pci_info pci_info;
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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u32 devdisr = in_be32(&gur->devdisr);
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uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
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uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
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uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
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uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1;
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uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
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if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
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SET_STD_PCI_INFO(pci_info, 1);
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set_next_law(pci_info.mem_phys,
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law_size_bits(pci_info.mem_size), pci_info.law);
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set_next_law(pci_info.io_phys,
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law_size_bits(pci_info.io_size), pci_info.law);
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pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
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printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
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pci_32 ? 32 : 64,
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pcix ? "PCIX" : "PCI",
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pci_spd_norm ? ">=" : "<=",
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pcix ? freq * 2 : freq,
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pcie_ep ? "agent" : "host",
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pci_arb ? "arbiter" : "external-arbiter");
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first_free_busno = fsl_pci_init_port(&pci_info,
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&pci1_hose, first_free_busno);
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} else {
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printf("PCI1: disabled\n");
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}
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#elif defined CONFIG_MPC8548
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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/* PCI1 not present on MPC8572 */
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setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
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#endif
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fsl_pcie_init_board(first_free_busno);
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_pci_setup(void *blob, bd_t *bd)
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{
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FT_FSL_PCI_SETUP;
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}
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#endif /* CONFIG_OF_BOARD_SETUP */
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