mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 11:13:07 +00:00
933b2f09cb
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
|
|
/*
|
|
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
|
|
* Copyright (C) 2020 Engicam S.r.l.
|
|
* Copyright (C) 2020 Amarula Solutions(India)
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
|
|
/* board early initialisation in board_f: need to use global variable */
|
|
static u32 opp_voltage_mv __section(".data");
|
|
|
|
void board_vddcore_init(u32 voltage_mv)
|
|
{
|
|
if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
|
|
opp_voltage_mv = voltage_mv;
|
|
}
|
|
|
|
int board_early_init_f(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
|
|
void board_debug_uart_init(void)
|
|
{
|
|
#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE)
|
|
|
|
#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
|
|
#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
|
|
|
|
/* UART4 clock enable */
|
|
setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
|
|
|
|
#define GPIOG_BASE 0x50008000
|
|
/* GPIOG clock enable */
|
|
writel(BIT(6), RCC_MP_AHB4ENSETR);
|
|
/* GPIO configuration for ST boards: Uart4 TX = G11 */
|
|
writel(0xffbfffff, GPIOG_BASE + 0x00);
|
|
writel(0x00006000, GPIOG_BASE + 0x24);
|
|
#else
|
|
|
|
#error("CONFIG_DEBUG_UART_BASE: not supported value")
|
|
|
|
#endif
|
|
}
|
|
#endif
|