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d69ddf2494
Create a non-cacheable mapping for the 0x600000000 physical memory region, where MMIO registers for the PCIe XHCI controller are instantiated by the PCIe bridge. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com> |
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.. | ||
include/mach | ||
init.c | ||
Kconfig | ||
lowlevel_init.S | ||
Makefile | ||
mbox.c | ||
msg.c | ||
phys2bus.c | ||
reset.c |