mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
26f92be07e
We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
68 lines
1.9 KiB
Text
68 lines
1.9 KiB
Text
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_TEXT_BASE=0x00200000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710"
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_TARGET_EVB_RK3399=y
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SYS_LOAD_ADDR=0x800800
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CONFIG_DEBUG_UART=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb"
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x2e000
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x400000
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CONFIG_SPL_BSS_MAX_SIZE=0x2000
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0x400000
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
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CONFIG_TPL=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM_ROCKCHIP_LPDDR4=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550_MEM32=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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