mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 10:18:38 +00:00
d5e8119bae
Today the bootcount is not managed by the Linux kernel for STM32MP15 as we don't have driver to update the used backup register in TAMP and the recovery command still executes the normal bootcmd with 'altbootcmd=run bootcmd'. So the bootcount feature is never used, the config CONFIG_BOOTCOUNT_LIMIT and the associated environment variable 'altbootcmd' can be removed to reduce the U-Boot size. Each boards can re-enable this feature later in their defconfig, if it is needed, with the expected backend, for example CONFIG_BOOTCOUNT_GENERIC or CONFIG_BOOTCOUNT_ENV. CC: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
226 lines
5.8 KiB
Text
226 lines
5.8 KiB
Text
if ARCH_STM32MP
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config SPL
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select SPL_BOARD_INIT
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select SPL_CLK
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select SPL_DM
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select SPL_DM_SEQ_ALIAS
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select SPL_DRIVERS_MISC
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select SPL_FRAMEWORK
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select SPL_GPIO
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select SPL_LIBCOMMON_SUPPORT
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select SPL_LIBGENERIC_SUPPORT
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select SPL_OF_CONTROL
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select SPL_OF_TRANSLATE
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select SPL_PINCTRL
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select SPL_REGMAP
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select SPL_DM_RESET
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select SPL_SERIAL
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select SPL_SYSCON
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select SPL_WATCHDOG if WATCHDOG
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imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
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imply SPL_BOOTSTAGE if BOOTSTAGE
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imply SPL_DISPLAY_PRINT
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imply SPL_LIBDISK_SUPPORT
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imply SPL_SPI_LOAD if SPL_SPI
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config SYS_SOC
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default "stm32mp"
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config SYS_MALLOC_LEN
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default 0x2000000
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config ENV_SIZE
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default 0x2000
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config STM32MP15x
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bool "Support STMicroelectronics STM32MP15x Soc"
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select ARCH_SUPPORT_PSCI
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select BINMAN
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select OF_BOARD_SETUP
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select PINCTRL_STM32
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select STM32_RCC
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select STM32_RESET
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select STM32_SERIAL
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select SYS_ARCH_TIMER
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imply CMD_NVEDIT_INFO
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help
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support of STMicroelectronics SOC STM32MP15x family
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STM32MP157, STM32MP153 or STM32MP151
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STMicroelectronics MPU with core ARMv7
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dual core A7 for STM32MP157/3, monocore for STM32MP151
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target all the STMicroelectronics board with SOC STM32MP1 family
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config STM32MP15x_STM32IMAGE
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bool "Support STM32 image for generated U-Boot image"
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depends on STM32MP15x && TFABOOT
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help
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Support of STM32 image generation for SOC STM32MP15x
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for TF-A boot when FIP container is not used
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choice
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prompt "STM32MP15x board select"
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optional
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config TARGET_ST_STM32MP15x
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bool "STMicroelectronics STM32MP15x boards"
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select STM32MP15x
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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target the STMicroelectronics board with SOC STM32MP15x
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managed by board/st/stm32mp1:
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Evalulation board (EV1) or Discovery board (DK1 and DK2).
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The difference between board are managed with devicetree
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config TARGET_MICROGEA_STM32MP1
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bool "Engicam MicroGEA STM32MP1 SOM"
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select STM32MP15x
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
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MicroGEA STM32MP1 MicroDev 2.0:
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* MicroDev 2.0 is a general purpose miniature carrier board with CAN,
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LTE and LVDS panel interfaces.
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* MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
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for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
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MicroGEA STM32MP1 MicroDev 2.0 7" OF:
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* 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
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panel and toucscreen.
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* MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
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pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
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Open Frame Solution board.
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config TARGET_ICORE_STM32MP1
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bool "Engicam i.Core STM32MP1 SOM"
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select STM32MP15x
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
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i.Core STM32MP1 EDIMM2.2:
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* EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
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* i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
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creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
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i.Core STM32MP1 C.TOUCH 2.0
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* C.TOUCH 2.0 is a general purpose Carrier board.
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* i.Core STM32MP1 needs to mount on top of this Carrier board
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for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
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config TARGET_DH_STM32MP1_PDK2
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bool "DH STM32MP1 PDK2"
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select STM32MP15x
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help
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Target the DH PDK2 development kit with STM32MP15x SoM.
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endchoice
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config SYS_TEXT_BASE
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default 0xC0100000
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config NR_DRAM_BANKS
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default 1
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config DDR_CACHEABLE_SIZE
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hex "Size of the DDR marked cacheable in pre-reloc stage"
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default 0x40000000
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help
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Define the size of the DDR marked as cacheable in U-Boot
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pre-reloc stage.
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This option can be useful to avoid speculatif access
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to secured area of DDR used by TF-A or OP-TEE before U-Boot
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initialization.
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The areas marked "no-map" in device tree should be located
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before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
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config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
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hex "Partition on MMC2 to use to load U-Boot from"
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depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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default 1
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help
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Partition on the second MMC to load U-Boot from when the MMC is being
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used in raw mode
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config STM32_ETZPC
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bool "STM32 Extended TrustZone Protection"
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depends on STM32MP15x
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default y
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imply BOOTP_SERVERIP
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help
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Say y to enable STM32 Extended TrustZone Protection
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config STM32_ECDSA_VERIFY
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bool "STM32 ECDSA verification via the ROM API"
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depends on SPL_ECDSA_VERIFY
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default y
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help
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Say y to enable the uclass driver for ECDSA verification using the
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ROM API provided on STM32MP.
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The ROM API is only available during SPL for now.
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config CMD_STM32KEY
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bool "command stm32key to fuse public key hash"
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help
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fuse public key hash in corresponding fuse used to authenticate
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binary.
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This command is used to evaluate the secure boot on stm32mp SOC,
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it is deactivated by default in real products.
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config PRE_CON_BUF_ADDR
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default 0xC02FF000
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config PRE_CON_BUF_SZ
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default 4096
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config BOOTSTAGE_STASH_ADDR
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default 0xC3000000
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if BOOTCOUNT_LIMIT
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config SYS_BOOTCOUNT_SINGLEWORD
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default y
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# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
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config SYS_BOOTCOUNT_ADDR
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default 0x5C00A154
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endif
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if DEBUG_UART
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config DEBUG_UART_BOARD_INIT
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default y
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# debug on UART4 by default
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config DEBUG_UART_BASE
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default 0x40010000
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# clock source is HSI on reset
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config DEBUG_UART_CLOCK
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default 64000000
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endif
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source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
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source "board/dhelectronics/dh_stm32mp1/Kconfig"
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source "board/engicam/stm32mp1/Kconfig"
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source "board/st/stm32mp1/Kconfig"
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endif
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