mirror of
https://github.com/AsahiLinux/u-boot
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39a9142203
printf goes to uart1, but it will block forever waiting for busy to go off unless the uart is enabled first. Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
110 lines
2.6 KiB
C
110 lines
2.6 KiB
C
/*
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* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
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*
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* (C) Copyright 2002 2003
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* Network Audio Technologies, Inc. <www.netaudiotech.com>
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* Adam Bezanson <bezanson@netaudiotech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/arch/ep93xx.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define MAX_BANK_SIZE 0x04000000 /* 64 MB */
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static ulong const bank_addr[CONFIG_NR_DRAM_BANKS] = {
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PHYS_SDRAM_1,
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#ifdef PHYS_SDRAM_2
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PHYS_SDRAM_2,
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#endif
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#ifdef PHYS_SDRAM_3
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PHYS_SDRAM_3,
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#endif
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#ifdef PHYS_SDRAM_4
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PHYS_SDRAM_4
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#endif
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};
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int board_init(void)
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{
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struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
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icache_enable();
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#ifdef USE_920T_MMU
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dcache_enable();
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#endif
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/*
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* set UARTBAUD bit to drive UARTs with 14.7456MHz instead of
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* 14.7456/2 MHz
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*/
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uint32_t value = readl(&syscon->pwrcnt);
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value |= SYSCON_PWRCNT_UART_BAUD;
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writel(value, &syscon->pwrcnt);
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/* Enable the uart in devicecfg */
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value = readl(&syscon->devicecfg);
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value |= 1<<18 /* U1EN */;
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writel(0xAA, &syscon->sysswlock);
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writel(value, &syscon->devicecfg);
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/* Machine number, as defined in linux/arch/arm/tools/mach-types */
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gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/* We have a console */
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gd->have_console = 1;
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return 0;
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}
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int board_eth_init(bd_t *bd)
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{
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return ep93xx_eth_initialize(0, MAC_BASE);
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}
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int dram_init(void)
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{
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unsigned int *src, *dst;
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int i;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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const ulong bank_size = get_ram_size((long *)bank_addr[i],
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MAX_BANK_SIZE);
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if (bank_size) {
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gd->bd->bi_dram[i].start = bank_addr[i];
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gd->bd->bi_dram[i].size = bank_size;
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}
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}
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/* copy exception vectors */
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src = (unsigned int *)_armboot_start;
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dst = (unsigned int *)PHYS_SDRAM_1;
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memcpy(dst, src, 16 * sizeof(unsigned int));
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return 0;
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}
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