mirror of
https://github.com/AsahiLinux/u-boot
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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
164 lines
3.7 KiB
C
164 lines
3.7 KiB
C
/*
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* (C) Copyright 2002 ELTEC Elektronik AG
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* Frank Gottschling <fgottschling@eltec.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <mpc106.h>
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#include <video_fb.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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int checkboard (void)
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{
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puts ("Board: ELTEC PowerPC\n");
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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int checkflash (void)
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{
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/* TODO */
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printf ("Test not implemented !\n");
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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static unsigned int mpc106_read_cfg_dword (unsigned int reg)
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{
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unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
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out32r (MPC106_REG_ADDR, reg_addr);
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return (in32r (MPC106_REG_DATA | (reg & 0x3)));
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}
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/* ------------------------------------------------------------------------- */
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long int dram_size (int board_type)
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{
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/*
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* No actual initialisation to do - done when setting up
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* PICRs MCCRs ME/SARs etc in asm_init.S.
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*/
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register unsigned long i, msar1, mear1, memSize;
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#if defined(CONFIG_SYS_MEMTEST)
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register unsigned long reg;
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printf ("Testing DRAM\n");
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/* write each mem addr with it's address */
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for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4)
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*reg = reg;
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for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) {
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if (*reg != reg)
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return -1;
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}
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#endif
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/*
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* Since MPC107 memory controller chip has already been set to
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* control all memory, just read and interpret its memory boundery register.
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*/
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memSize = 0;
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msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
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mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
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i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
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do {
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if (i & 0x01) /* is bank enabled ? */
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memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
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msar1 >>= 8;
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mear1 >>= 8;
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i >>= 1;
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} while (i);
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return (memSize * 0x100000);
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}
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/* ------------------------------------------------------------------------- */
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phys_size_t initdram (int board_type)
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{
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return dram_size (board_type);
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}
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/* ------------------------------------------------------------------------- */
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/*
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* The BAB 911 can be reset by writing bit 0 of the Processor Initialization
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* Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
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* Memory Block).
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*/
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int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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out8 (MPC107_EUMB_PI, 1);
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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#if defined(CONFIG_WATCHDOG)
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/*
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* Since the 7xx CPUs don't have an internal watchdog, this function is
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* board specific.
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*/
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void watchdog_reset (void)
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{
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}
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#endif /* CONFIG_WATCHDOG */
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/* ------------------------------------------------------------------------- */
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void after_reloc (ulong dest_addr)
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{
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/*
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* Jump to the main U-Boot board init code
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*/
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board_init_r ((gd_t *)gd, dest_addr);
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}
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/* ------------------------------------------------------------------------- */
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#ifdef CONFIG_CONSOLE_EXTRA_INFO
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extern GraphicDevice smi;
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void video_get_info_str (int line_number, char *info)
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{
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/* init video info strings for graphic console */
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switch (line_number) {
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case 1:
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sprintf (info, " MPC7xx V%d.%d at %d / %d MHz",
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(get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100);
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return;
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case 2:
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sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
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dram_size (0) / 0x100000, flash_init () / 0x100000);
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return;
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case 3:
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sprintf (info, " %s", smi.modeIdent);
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return;
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}
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/* no more info lines */
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*info = 0;
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return;
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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