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https://github.com/AsahiLinux/u-boot
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0782a8803d
Fix incorrect parametr in CMD_CHECK_BITS_CLR command Pass CLR parameter to DCD header for CMD_CHECK_BITS_CLR Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
806 lines
22 KiB
C
806 lines
22 KiB
C
/*
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* (C) Copyright 2009
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* (C) Copyright 2008
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "imagetool.h"
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#include <image.h>
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#include "imximage.h"
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#define UNDEFINED 0xFFFFFFFF
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/*
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* Supported commands for configuration file
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*/
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static table_entry_t imximage_cmds[] = {
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{CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
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{CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
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{CMD_WRITE_DATA, "DATA", "Reg Write Data", },
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{CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
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{CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
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{CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
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{CMD_CSF, "CSF", "Command Sequence File", },
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{CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
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{-1, "", "", },
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};
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/*
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* Supported Boot options for configuration file
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* this is needed to set the correct flash offset
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*/
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static table_entry_t imximage_boot_offset[] = {
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{FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
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{FLASH_OFFSET_NAND, "nand", "NAND Flash", },
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{FLASH_OFFSET_NOR, "nor", "NOR Flash", },
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{FLASH_OFFSET_SATA, "sata", "SATA Disk", },
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{FLASH_OFFSET_SD, "sd", "SD Card", },
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{FLASH_OFFSET_SPI, "spi", "SPI Flash", },
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{FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
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{-1, "", "Invalid", },
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};
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/*
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* Supported Boot options for configuration file
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* this is needed to determine the initial load size
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*/
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static table_entry_t imximage_boot_loadsize[] = {
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{FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
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{FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
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{FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
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{FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
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{FLASH_LOADSIZE_SD, "sd", "SD Card", },
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{FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
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{FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
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{-1, "", "Invalid", },
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};
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/*
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* IMXIMAGE version definition for i.MX chips
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*/
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static table_entry_t imximage_versions[] = {
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{IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
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{IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
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{-1, "", " (Invalid)", },
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};
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static struct imx_header imximage_header;
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static uint32_t imximage_version;
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/*
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* Image Vector Table Offset
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* Initialized to a wrong not 4-bytes aligned address to
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* check if it is was set by the cfg file.
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*/
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static uint32_t imximage_ivt_offset = UNDEFINED;
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static uint32_t imximage_csf_size = UNDEFINED;
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/* Initial Load Region Size */
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static uint32_t imximage_init_loadsize;
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static set_dcd_val_t set_dcd_val;
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static set_dcd_param_t set_dcd_param;
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static set_dcd_rst_t set_dcd_rst;
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static set_imx_hdr_t set_imx_hdr;
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static uint32_t max_dcd_entries;
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static uint32_t *header_size_ptr;
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static uint32_t *csf_ptr;
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static uint32_t get_cfg_value(char *token, char *name, int linenr)
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{
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char *endptr;
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uint32_t value;
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errno = 0;
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value = strtoul(token, &endptr, 16);
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if (errno || (token == endptr)) {
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fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
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name, linenr, token);
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exit(EXIT_FAILURE);
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}
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return value;
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}
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static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
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{
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imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
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imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
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flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
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flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
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/* Try to detect V1 */
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if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
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(hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
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return IMXIMAGE_V1;
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/* Try to detect V2 */
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if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
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(hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
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return IMXIMAGE_V2;
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return IMXIMAGE_VER_INVALID;
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}
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static void err_imximage_version(int version)
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{
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fprintf(stderr,
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"Error: Unsupported imximage version:%d\n", version);
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exit(EXIT_FAILURE);
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}
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static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
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int fld, uint32_t value, uint32_t off)
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{
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dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
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switch (fld) {
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case CFG_REG_SIZE:
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/* Byte, halfword, word */
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if ((value != 1) && (value != 2) && (value != 4)) {
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fprintf(stderr, "Error: %s[%d] - "
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"Invalid register size " "(%d)\n",
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name, lineno, value);
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exit(EXIT_FAILURE);
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}
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dcd_v1->addr_data[off].type = value;
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break;
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case CFG_REG_ADDRESS:
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dcd_v1->addr_data[off].addr = value;
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break;
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case CFG_REG_VALUE:
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dcd_v1->addr_data[off].value = value;
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break;
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default:
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break;
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}
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}
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static struct dcd_v2_cmd *gd_last_cmd;
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static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
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int32_t cmd)
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{
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dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
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struct dcd_v2_cmd *d = gd_last_cmd;
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struct dcd_v2_cmd *d2;
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int len;
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if (!d)
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d = &dcd_v2->dcd_cmd;
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d2 = d;
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len = be16_to_cpu(d->write_dcd_command.length);
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if (len > 4)
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d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
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switch (cmd) {
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case CMD_WRITE_DATA:
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if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
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(d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
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break;
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d = d2;
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d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
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d->write_dcd_command.length = cpu_to_be16(4);
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d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
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break;
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case CMD_WRITE_CLR_BIT:
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if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
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(d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
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break;
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d = d2;
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d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
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d->write_dcd_command.length = cpu_to_be16(4);
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d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
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break;
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/*
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* Check data command only supports one entry,
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*/
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case CMD_CHECK_BITS_SET:
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d = d2;
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d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
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d->write_dcd_command.length = cpu_to_be16(4);
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d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
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break;
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case CMD_CHECK_BITS_CLR:
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d = d2;
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d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
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d->write_dcd_command.length = cpu_to_be16(4);
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d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
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break;
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default:
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break;
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}
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gd_last_cmd = d;
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}
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static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
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int fld, uint32_t value, uint32_t off)
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{
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struct dcd_v2_cmd *d = gd_last_cmd;
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int len;
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len = be16_to_cpu(d->write_dcd_command.length);
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off = (len - 4) >> 3;
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switch (fld) {
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case CFG_REG_ADDRESS:
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d->addr_data[off].addr = cpu_to_be32(value);
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break;
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case CFG_REG_VALUE:
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d->addr_data[off].value = cpu_to_be32(value);
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off++;
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d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
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break;
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default:
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break;
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}
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}
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/*
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* Complete setting up the rest field of DCD of V1
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* such as barker code and DCD data length.
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*/
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static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
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char *name, int lineno)
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{
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dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
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dcd_v1->preamble.barker = DCD_BARKER;
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dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
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}
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/*
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* Complete setting up the reset field of DCD of V2
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* such as DCD tag, version, length, etc.
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*/
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static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
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char *name, int lineno)
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{
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dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
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struct dcd_v2_cmd *d = gd_last_cmd;
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int len;
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if (!d)
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d = &dcd_v2->dcd_cmd;
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len = be16_to_cpu(d->write_dcd_command.length);
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if (len > 4)
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d = (struct dcd_v2_cmd *)(((char *)d) + len);
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len = (char *)d - (char *)&dcd_v2->header;
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dcd_v2->header.tag = DCD_HEADER_TAG;
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dcd_v2->header.length = cpu_to_be16(len);
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dcd_v2->header.version = DCD_VERSION;
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}
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static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
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uint32_t entry_point, uint32_t flash_offset)
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{
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imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
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flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
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dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
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uint32_t hdr_base;
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uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
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- ((char *)imxhdr));
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/* Set magic number */
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fhdr_v1->app_code_barker = APP_CODE_BARKER;
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/* TODO: check i.MX image V1 handling, for now use 'old' style */
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hdr_base = entry_point - 4096;
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fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
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fhdr_v1->app_code_jump_vector = entry_point;
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fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
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fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
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/* Security feature are not supported */
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fhdr_v1->app_code_csf = 0;
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fhdr_v1->super_root_key = 0;
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header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
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}
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static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
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uint32_t entry_point, uint32_t flash_offset)
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{
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imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
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flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
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uint32_t hdr_base;
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/* Set magic number */
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fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
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fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
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fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
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fhdr_v2->entry = entry_point;
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fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
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hdr_base = entry_point - imximage_init_loadsize +
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flash_offset;
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fhdr_v2->self = hdr_base;
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if (dcd_len > 0)
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fhdr_v2->dcd_ptr = hdr_base
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+ offsetof(imx_header_v2_t, dcd_table);
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else
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fhdr_v2->dcd_ptr = 0;
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fhdr_v2->boot_data_ptr = hdr_base
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+ offsetof(imx_header_v2_t, boot_data);
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hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
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fhdr_v2->csf = 0;
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header_size_ptr = &hdr_v2->boot_data.size;
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csf_ptr = &fhdr_v2->csf;
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}
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static void set_hdr_func(void)
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{
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switch (imximage_version) {
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case IMXIMAGE_V1:
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set_dcd_val = set_dcd_val_v1;
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set_dcd_param = NULL;
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set_dcd_rst = set_dcd_rst_v1;
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set_imx_hdr = set_imx_hdr_v1;
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max_dcd_entries = MAX_HW_CFG_SIZE_V1;
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break;
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case IMXIMAGE_V2:
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gd_last_cmd = NULL;
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set_dcd_val = set_dcd_val_v2;
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set_dcd_param = set_dcd_param_v2;
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set_dcd_rst = set_dcd_rst_v2;
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set_imx_hdr = set_imx_hdr_v2;
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max_dcd_entries = MAX_HW_CFG_SIZE_V2;
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break;
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default:
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err_imximage_version(imximage_version);
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break;
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}
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}
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static void print_hdr_v1(struct imx_header *imx_hdr)
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{
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imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
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flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
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dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
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uint32_t size, length, ver;
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size = dcd_v1->preamble.length;
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if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
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fprintf(stderr,
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"Error: Image corrupt DCD size %d exceed maximum %d\n",
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(uint32_t)(size / sizeof(dcd_type_addr_data_t)),
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MAX_HW_CFG_SIZE_V1);
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exit(EXIT_FAILURE);
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}
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length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
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ver = detect_imximage_version(imx_hdr);
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printf("Image Type: Freescale IMX Boot Image\n");
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printf("Image Ver: %x", ver);
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printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
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printf("Data Size: ");
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genimg_print_size(dcd_v1->addr_data[length].type);
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printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
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printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
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}
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static void print_hdr_v2(struct imx_header *imx_hdr)
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{
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imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
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flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
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dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table;
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uint32_t size, version;
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size = be16_to_cpu(dcd_v2->header.length);
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if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t)) + 8) {
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fprintf(stderr,
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"Error: Image corrupt DCD size %d exceed maximum %d\n",
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(uint32_t)(size / sizeof(dcd_addr_data_t)),
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MAX_HW_CFG_SIZE_V2);
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exit(EXIT_FAILURE);
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}
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version = detect_imximage_version(imx_hdr);
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printf("Image Type: Freescale IMX Boot Image\n");
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printf("Image Ver: %x", version);
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printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
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printf("Data Size: ");
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genimg_print_size(hdr_v2->boot_data.size);
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printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
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printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
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if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
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(imximage_csf_size != UNDEFINED)) {
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printf("HAB Blocks: %08x %08x %08x\n",
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(uint32_t)fhdr_v2->self, 0,
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hdr_v2->boot_data.size - imximage_ivt_offset -
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imximage_csf_size);
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}
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}
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static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
|
|
char *name, int lineno, int fld, int dcd_len)
|
|
{
|
|
int value;
|
|
static int cmd_ver_first = ~0;
|
|
|
|
switch (cmd) {
|
|
case CMD_IMAGE_VERSION:
|
|
imximage_version = get_cfg_value(token, name, lineno);
|
|
if (cmd_ver_first == 0) {
|
|
fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
|
|
"command need be the first before other "
|
|
"valid command in the file\n", name, lineno);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
cmd_ver_first = 1;
|
|
set_hdr_func();
|
|
break;
|
|
case CMD_BOOT_FROM:
|
|
imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
|
|
"imximage boot option", token);
|
|
if (imximage_ivt_offset == -1) {
|
|
fprintf(stderr, "Error: %s[%d] -Invalid boot device"
|
|
"(%s)\n", name, lineno, token);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
imximage_init_loadsize =
|
|
get_table_entry_id(imximage_boot_loadsize,
|
|
"imximage boot option", token);
|
|
|
|
if (imximage_init_loadsize == -1) {
|
|
fprintf(stderr,
|
|
"Error: %s[%d] -Invalid boot device(%s)\n",
|
|
name, lineno, token);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
/*
|
|
* The SOC loads from the storage starting at address 0
|
|
* then ensures that the load size contains the offset
|
|
*/
|
|
if (imximage_init_loadsize < imximage_ivt_offset)
|
|
imximage_init_loadsize = imximage_ivt_offset;
|
|
if (unlikely(cmd_ver_first != 1))
|
|
cmd_ver_first = 0;
|
|
break;
|
|
case CMD_BOOT_OFFSET:
|
|
imximage_ivt_offset = get_cfg_value(token, name, lineno);
|
|
if (unlikely(cmd_ver_first != 1))
|
|
cmd_ver_first = 0;
|
|
break;
|
|
case CMD_WRITE_DATA:
|
|
case CMD_WRITE_CLR_BIT:
|
|
case CMD_CHECK_BITS_SET:
|
|
case CMD_CHECK_BITS_CLR:
|
|
value = get_cfg_value(token, name, lineno);
|
|
if (set_dcd_param)
|
|
(*set_dcd_param)(imxhdr, dcd_len, cmd);
|
|
(*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
|
|
if (unlikely(cmd_ver_first != 1))
|
|
cmd_ver_first = 0;
|
|
break;
|
|
case CMD_CSF:
|
|
if (imximage_version != 2) {
|
|
fprintf(stderr,
|
|
"Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
|
|
name, lineno, token);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
imximage_csf_size = get_cfg_value(token, name, lineno);
|
|
if (unlikely(cmd_ver_first != 1))
|
|
cmd_ver_first = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
|
|
char *token, char *name, int lineno, int fld, int *dcd_len)
|
|
{
|
|
int value;
|
|
|
|
switch (fld) {
|
|
case CFG_COMMAND:
|
|
*cmd = get_table_entry_id(imximage_cmds,
|
|
"imximage commands", token);
|
|
if (*cmd < 0) {
|
|
fprintf(stderr, "Error: %s[%d] - Invalid command"
|
|
"(%s)\n", name, lineno, token);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
break;
|
|
case CFG_REG_SIZE:
|
|
parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
|
|
break;
|
|
case CFG_REG_ADDRESS:
|
|
case CFG_REG_VALUE:
|
|
switch(*cmd) {
|
|
case CMD_WRITE_DATA:
|
|
case CMD_WRITE_CLR_BIT:
|
|
case CMD_CHECK_BITS_SET:
|
|
case CMD_CHECK_BITS_CLR:
|
|
|
|
value = get_cfg_value(token, name, lineno);
|
|
if (set_dcd_param)
|
|
(*set_dcd_param)(imxhdr, *dcd_len, *cmd);
|
|
(*set_dcd_val)(imxhdr, name, lineno, fld, value,
|
|
*dcd_len);
|
|
|
|
if (fld == CFG_REG_VALUE) {
|
|
(*dcd_len)++;
|
|
if (*dcd_len > max_dcd_entries) {
|
|
fprintf(stderr, "Error: %s[%d] -"
|
|
"DCD table exceeds maximum size(%d)\n",
|
|
name, lineno, max_dcd_entries);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
|
|
{
|
|
FILE *fd = NULL;
|
|
char *line = NULL;
|
|
char *token, *saveptr1, *saveptr2;
|
|
int lineno = 0;
|
|
int fld;
|
|
size_t len;
|
|
int dcd_len = 0;
|
|
int32_t cmd;
|
|
|
|
fd = fopen(name, "r");
|
|
if (fd == 0) {
|
|
fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
/*
|
|
* Very simple parsing, line starting with # are comments
|
|
* and are dropped
|
|
*/
|
|
while ((getline(&line, &len, fd)) > 0) {
|
|
lineno++;
|
|
|
|
token = strtok_r(line, "\r\n", &saveptr1);
|
|
if (token == NULL)
|
|
continue;
|
|
|
|
/* Check inside the single line */
|
|
for (fld = CFG_COMMAND, cmd = CMD_INVALID,
|
|
line = token; ; line = NULL, fld++) {
|
|
token = strtok_r(line, " \t", &saveptr2);
|
|
if (token == NULL)
|
|
break;
|
|
|
|
/* Drop all text starting with '#' as comments */
|
|
if (token[0] == '#')
|
|
break;
|
|
|
|
parse_cfg_fld(imxhdr, &cmd, token, name,
|
|
lineno, fld, &dcd_len);
|
|
}
|
|
|
|
}
|
|
|
|
(*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
|
|
fclose(fd);
|
|
|
|
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
|
|
if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
|
|
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
return dcd_len;
|
|
}
|
|
|
|
|
|
static int imximage_check_image_types(uint8_t type)
|
|
{
|
|
if (type == IH_TYPE_IMXIMAGE)
|
|
return EXIT_SUCCESS;
|
|
else
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
static int imximage_verify_header(unsigned char *ptr, int image_size,
|
|
struct image_tool_params *params)
|
|
{
|
|
struct imx_header *imx_hdr = (struct imx_header *) ptr;
|
|
|
|
if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
|
|
return -FDT_ERR_BADSTRUCTURE;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void imximage_print_header(const void *ptr)
|
|
{
|
|
struct imx_header *imx_hdr = (struct imx_header *) ptr;
|
|
uint32_t version = detect_imximage_version(imx_hdr);
|
|
|
|
switch (version) {
|
|
case IMXIMAGE_V1:
|
|
print_hdr_v1(imx_hdr);
|
|
break;
|
|
case IMXIMAGE_V2:
|
|
print_hdr_v2(imx_hdr);
|
|
break;
|
|
default:
|
|
err_imximage_version(version);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
|
|
struct image_tool_params *params)
|
|
{
|
|
struct imx_header *imxhdr = (struct imx_header *)ptr;
|
|
uint32_t dcd_len;
|
|
|
|
/*
|
|
* In order to not change the old imx cfg file
|
|
* by adding VERSION command into it, here need
|
|
* set up function ptr group to V1 by default.
|
|
*/
|
|
imximage_version = IMXIMAGE_V1;
|
|
/* Be able to detect if the cfg file has no BOOT_FROM tag */
|
|
imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
|
|
imximage_csf_size = 0;
|
|
set_hdr_func();
|
|
|
|
/* Parse dcd configuration file */
|
|
dcd_len = parse_cfg_file(imxhdr, params->imagename);
|
|
|
|
if (imximage_version == IMXIMAGE_V2) {
|
|
if (imximage_init_loadsize < imximage_ivt_offset +
|
|
sizeof(imx_header_v2_t))
|
|
imximage_init_loadsize = imximage_ivt_offset +
|
|
sizeof(imx_header_v2_t);
|
|
}
|
|
|
|
/* Set the imx header */
|
|
(*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
|
|
|
|
/*
|
|
* ROM bug alert
|
|
*
|
|
* MX53 only loads 512 byte multiples in case of SD boot.
|
|
* MX53 only loads NAND page multiples in case of NAND boot and
|
|
* supports up to 4096 byte large pages, thus align to 4096.
|
|
*
|
|
* The remaining fraction of a block bytes would not be loaded!
|
|
*/
|
|
*header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
|
|
|
|
if (csf_ptr && imximage_csf_size) {
|
|
*csf_ptr = params->ep - imximage_init_loadsize +
|
|
*header_size_ptr;
|
|
*header_size_ptr += imximage_csf_size;
|
|
}
|
|
}
|
|
|
|
int imximage_check_params(struct image_tool_params *params)
|
|
{
|
|
if (!params)
|
|
return CFG_INVALID;
|
|
if (!strlen(params->imagename)) {
|
|
fprintf(stderr, "Error: %s - Configuration file not specified, "
|
|
"it is needed for imximage generation\n",
|
|
params->cmdname);
|
|
return CFG_INVALID;
|
|
}
|
|
/*
|
|
* Check parameters:
|
|
* XIP is not allowed and verify that incompatible
|
|
* parameters are not sent at the same time
|
|
* For example, if list is required a data image must not be provided
|
|
*/
|
|
return (params->dflag && (params->fflag || params->lflag)) ||
|
|
(params->fflag && (params->dflag || params->lflag)) ||
|
|
(params->lflag && (params->dflag || params->fflag)) ||
|
|
(params->xflag) || !(strlen(params->imagename));
|
|
}
|
|
|
|
static int imximage_generate(struct image_tool_params *params,
|
|
struct image_type_params *tparams)
|
|
{
|
|
struct imx_header *imxhdr;
|
|
size_t alloc_len;
|
|
struct stat sbuf;
|
|
char *datafile = params->datafile;
|
|
uint32_t pad_len;
|
|
|
|
memset(&imximage_header, 0, sizeof(imximage_header));
|
|
|
|
/*
|
|
* In order to not change the old imx cfg file
|
|
* by adding VERSION command into it, here need
|
|
* set up function ptr group to V1 by default.
|
|
*/
|
|
imximage_version = IMXIMAGE_V1;
|
|
/* Be able to detect if the cfg file has no BOOT_FROM tag */
|
|
imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
|
|
imximage_csf_size = 0;
|
|
set_hdr_func();
|
|
|
|
/* Parse dcd configuration file */
|
|
parse_cfg_file(&imximage_header, params->imagename);
|
|
|
|
/* TODO: check i.MX image V1 handling, for now use 'old' style */
|
|
if (imximage_version == IMXIMAGE_V1) {
|
|
alloc_len = 4096;
|
|
} else {
|
|
if (imximage_init_loadsize < imximage_ivt_offset +
|
|
sizeof(imx_header_v2_t))
|
|
imximage_init_loadsize = imximage_ivt_offset +
|
|
sizeof(imx_header_v2_t);
|
|
alloc_len = imximage_init_loadsize - imximage_ivt_offset;
|
|
}
|
|
|
|
if (alloc_len < sizeof(struct imx_header)) {
|
|
fprintf(stderr, "%s: header error\n",
|
|
params->cmdname);
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
imxhdr = malloc(alloc_len);
|
|
|
|
if (!imxhdr) {
|
|
fprintf(stderr, "%s: malloc return failure: %s\n",
|
|
params->cmdname, strerror(errno));
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
memset(imxhdr, 0, alloc_len);
|
|
|
|
tparams->header_size = alloc_len;
|
|
tparams->hdr = imxhdr;
|
|
|
|
/* determine data image file length */
|
|
|
|
if (stat(datafile, &sbuf) < 0) {
|
|
fprintf(stderr, "%s: Can't stat %s: %s\n",
|
|
params->cmdname, datafile, strerror(errno));
|
|
exit(EXIT_FAILURE);
|
|
}
|
|
|
|
pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
|
|
|
|
/* TODO: check i.MX image V1 handling, for now use 'old' style */
|
|
if (imximage_version == IMXIMAGE_V1)
|
|
return 0;
|
|
else
|
|
return pad_len;
|
|
}
|
|
|
|
|
|
/*
|
|
* imximage parameters
|
|
*/
|
|
U_BOOT_IMAGE_TYPE(
|
|
imximage,
|
|
"Freescale i.MX Boot Image support",
|
|
0,
|
|
NULL,
|
|
imximage_check_params,
|
|
imximage_verify_header,
|
|
imximage_print_header,
|
|
imximage_set_header,
|
|
NULL,
|
|
imximage_check_image_types,
|
|
NULL,
|
|
imximage_generate
|
|
);
|