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1d3d0f1f1c
This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
16 lines
309 B
C
16 lines
309 B
C
/*
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* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/sizes.h>
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#include <asm/addrspace.h>
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#include <mach/ddr.h>
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phys_size_t initdram(int board_type)
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{
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ddr_tap_tuning();
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return get_ram_size((void *)KSEG1, SZ_256M);
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}
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