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6c1bf6c442
Fix bit 2 name of PWR_CR3 register to match with the last STM32H7 reference manual available here : http://www.st.com/content/st_com/en/support/resources/ resource-selector.html?querycriteria=productId=SS1951$$ resourceCategory=technical_literature$$resourceType=reference_manual Update also comment about voltage scaling 1 values Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com> |
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| .. | ||
| aspeed | ||
| at91 | ||
| exynos | ||
| renesas | ||
| rockchip | ||
| tegra | ||
| uniphier | ||
| clk-uclass.c | ||
| clk_bcm6345.c | ||
| clk_boston.c | ||
| clk_fixed_rate.c | ||
| clk_pic32.c | ||
| clk_sandbox.c | ||
| clk_sandbox_test.c | ||
| clk_stm32f7.c | ||
| clk_stm32h7.c | ||
| clk_zynq.c | ||
| clk_zynqmp.c | ||
| Kconfig | ||
| Makefile | ||