u-boot/drivers/ddr
Chris Packham 0d0df46ee7 arm: mvebu: Add Marvell's integrated CPUs
Marvell's switch chips with integrated CPUs (collectively referred to as
MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks
(e.g. xor) are located at different addresses and DFX server exists as a
separate target on the MBUS (on Armada-38x it's just part of the core
complex registers).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12 07:04:18 +02:00
..
altera ddr: socfpga: Clean up ddr_setup() 2019-03-09 23:25:19 +01:00
fsl configs: fsl: move DDR specific defines to Kconfig 2019-03-03 20:56:01 +05:30
imx drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00
marvell arm: mvebu: Add Marvell's integrated CPUs 2019-04-12 07:04:18 +02:00
microchip SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00