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https://github.com/AsahiLinux/u-boot
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d38826a3dc
The @gdsys.cc addresses are supposed to be used for mailing lists. Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc equivalent. Also, Dirk's address was wrong in one place; fix that as well. Signed-off-by: Mario Six <six@gdsys.cc>
100 lines
1.7 KiB
C
100 lines
1.7 KiB
C
/*
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* (C) Copyright 2014
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* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/global_data.h>
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#include "mpc8308.h"
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#include <gdsys_fpga.h>
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#define REFLECTION_TESTPATTERN 0xdede
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#define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff)
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#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
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#define REFLECTION_TESTREG reflection_low
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#else
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#define REFLECTION_TESTREG reflection_high
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int get_fpga_state(unsigned dev)
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{
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return gd->arch.fpga_state[dev];
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}
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int board_early_init_f(void)
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{
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unsigned k;
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for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
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gd->arch.fpga_state[k] = 0;
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return 0;
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}
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int board_early_init_r(void)
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{
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unsigned k;
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unsigned ctr;
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for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
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gd->arch.fpga_state[k] = 0;
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/*
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* reset FPGA
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*/
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mpc8308_init();
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mpc8308_set_fpga_reset(1);
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mpc8308_setup_hw();
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for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
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ctr = 0;
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while (!mpc8308_get_fpga_done(k)) {
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udelay(100000);
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if (ctr++ > 5) {
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gd->arch.fpga_state[k] |=
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FPGA_STATE_DONE_FAILED;
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break;
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}
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}
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}
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udelay(10);
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mpc8308_set_fpga_reset(0);
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for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
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/*
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* wait for fpga out of reset
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*/
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ctr = 0;
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while (1) {
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u16 val;
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FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN);
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FPGA_GET_REG(k, REFLECTION_TESTREG, &val);
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if (val == REFLECTION_TESTPATTERN_INV)
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break;
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udelay(100000);
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if (ctr++ > 5) {
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gd->arch.fpga_state[k] |=
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FPGA_STATE_REFLECTION_FAILED;
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break;
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}
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}
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}
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return 0;
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}
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