Marek Vasut d2ea49508a ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2 ... This is kind of microseries-within-series indent cleanup. This patch just tweaks the indentation so it is visible what is supposed to go where. It is likely that this patch has checkpatch warnings, but for the sake of not breaking the code, these are ignored. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>		2015-08-08 14:14:16 +02:00
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altera	ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2	2015-08-08 14:14:16 +02:00
fsl	drivers/ddr/fsl: Adjust bstopre value	2015-08-03 12:06:38 -07:00
marvell	arm: mvebu: a38x: Use correct PEX register access macros	2015-07-23 10:39:25 +02:00