mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 22:03:15 +00:00
fe133eb192
Add i.MX8QM qmx8 congatec board support U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Congatec QMX8 Qseven series Board: conga-QMX8 Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9 Boot: SD2 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 switch to partitions #0, OK mmc2 is current device Net: Error: ethernet@5b040000 address not set. No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
181 lines
5.4 KiB
C
181 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2017-2018 NXP
|
|
* Copyright 2018 congatec AG
|
|
*
|
|
*/
|
|
|
|
#ifndef __CGTQMX8_H
|
|
#define __CGTQMX8_H
|
|
|
|
#include <linux/sizes.h>
|
|
#include <asm/arch/imx-regs.h>
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
#define CONFIG_SPL_TEXT_BASE 0x0
|
|
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
|
|
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
|
|
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
|
|
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
|
|
|
|
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
|
|
#define CONFIG_SPL_STACK 0x013E000
|
|
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
|
|
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
|
|
#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
|
|
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
|
|
#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
|
|
#define CONFIG_MALLOC_F_ADDR 0x00120000
|
|
|
|
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
|
|
|
|
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
|
|
|
|
#define CONFIG_OF_EMBED
|
|
#endif
|
|
|
|
#define CONFIG_REMAKE_ELF
|
|
|
|
#define CONFIG_BOARD_EARLY_INIT_F
|
|
|
|
/* Flat Device Tree Definitions */
|
|
#define CONFIG_OF_BOARD_SETUP
|
|
|
|
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
|
|
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
|
#define USDHC1_BASE_ADDR 0x5B010000
|
|
#define USDHC2_BASE_ADDR 0x5B020000
|
|
#define USDHC3_BASE_ADDR 0x5B030000
|
|
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
|
|
|
|
#define CONFIG_ENV_OVERWRITE
|
|
|
|
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
|
|
/* Boot M4 */
|
|
#define M4_BOOT_ENV \
|
|
"m4_0_image=m4_0.bin\0" \
|
|
"m4_1_image=m4_1.bin\0" \
|
|
"loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
|
|
"loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
|
|
"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
|
|
"m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
|
|
|
|
#ifdef CONFIG_NAND_BOOT
|
|
#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
|
|
#else
|
|
#define MFG_NAND_PARTITION ""
|
|
#endif
|
|
#define FEC0_RESET IMX_GPIO_NR(2, 5)
|
|
#define FEC0_PDOMAIN "conn_enet0"
|
|
|
|
#define CONFIG_MFG_ENV_SETTINGS \
|
|
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
|
|
"rdinit=/linuxrc " \
|
|
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
|
|
"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
|
|
"g_mass_storage.iSerialNumber=\"\" "\
|
|
MFG_NAND_PARTITION \
|
|
"clk_ignore_unused "\
|
|
"\0" \
|
|
"initrd_addr=0x83800000\0" \
|
|
"bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
|
|
|
|
/* Initial environment variables */
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
CONFIG_MFG_ENV_SETTINGS \
|
|
M4_BOOT_ENV \
|
|
"script=boot.scr\0" \
|
|
"image=Image\0" \
|
|
"panel=NULL\0" \
|
|
"console=ttyLP0\0" \
|
|
"fdt_addr=0x83000000\0" \
|
|
"boot_fdt=try\0" \
|
|
"fdt_file=imx8qm-cgt-qmx8.dtb\0" \
|
|
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
|
|
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
|
|
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
|
"mmcautodetect=yes\0" \
|
|
"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
|
|
"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
|
"bootscript=echo Running bootscript from mmc ...; " \
|
|
"source\0" \
|
|
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
|
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
|
"mmcboot=echo Booting from mmc ...; " \
|
|
"run mmcargs; " \
|
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
|
"if run loadfdt; then " \
|
|
"booti ${loadaddr} - ${fdt_addr}; " \
|
|
"else " \
|
|
"echo WARN: Cannot load the DT; " \
|
|
"fi; " \
|
|
"else " \
|
|
"echo wait for boot; " \
|
|
"fi;\0" \
|
|
"netargs=setenv bootargs console=${console},${baudrate} " \
|
|
"root=/dev/nfs " \
|
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
|
|
"netboot=echo Booting from net ...; " \
|
|
"run netargs; " \
|
|
"if test ${ip_dyn} = yes; then " \
|
|
"setenv get_cmd dhcp; " \
|
|
"else " \
|
|
"setenv get_cmd tftp; " \
|
|
"fi; " \
|
|
"${get_cmd} ${loadaddr} ${image}; " \
|
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
|
"booti ${loadaddr} - ${fdt_addr}; " \
|
|
"else " \
|
|
"echo WARN: Cannot load the DT; " \
|
|
"fi; " \
|
|
"else " \
|
|
"booti; " \
|
|
"fi;\0"
|
|
|
|
#define CONFIG_BOOTCOMMAND \
|
|
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
|
"if run loadbootscript; then " \
|
|
"run bootscript; " \
|
|
"else " \
|
|
"if run loadimage; then " \
|
|
"run mmcboot; " \
|
|
"else run netboot; " \
|
|
"fi; " \
|
|
"fi; " \
|
|
"else booti ${loadaddr} - ${fdt_addr}; fi"
|
|
|
|
/* Link Definitions */
|
|
#define CONFIG_LOADADDR 0x80280000
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
|
|
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
|
|
|
|
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
|
|
|
|
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
|
|
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
|
|
|
/* Size of malloc() pool */
|
|
#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE 0x80000000
|
|
#define PHYS_SDRAM_1 0x80000000
|
|
#define PHYS_SDRAM_2 0x880000000
|
|
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
|
|
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
|
|
|
|
/* Serial */
|
|
#define CONFIG_BAUDRATE 115200
|
|
|
|
/* Generic Timer Definitions */
|
|
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
|
|
|
|
/* Networking */
|
|
#define CONFIG_FEC_MXC_PHYADDR -1
|
|
#define CONFIG_FEC_XCV_TYPE RGMII
|
|
#define FEC_QUIRK_ENET_MAC
|
|
|
|
#endif /* __CGTQMX8_H */
|