mirror of
https://github.com/AsahiLinux/u-boot
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ff4e87c030
This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini <trini@konsulko.com>
41 lines
906 B
C
41 lines
906 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/global_data.h>
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#include <fsl_ifc.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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DECLARE_GLOBAL_DATA_PTR;
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ulong cpu_init_f(void)
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{
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#ifdef CONFIG_SYS_INIT_L2_ADDR
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ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
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/* set MBECCDIS=1, SBECCDIS=1 */
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out_be32(&l2cache->l2errdis,
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(MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
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/* set L2E=1 & L2SRAM=001 */
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out_be32(&l2cache->l2ctl,
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(MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
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#endif
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return 0;
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}
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void udelay(unsigned long usec)
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{
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u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000);
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u32 ticks = ticks_per_usec * usec;
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u32 s = mfspr(SPRN_TBRL);
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while ((mfspr(SPRN_TBRL) - s) < ticks);
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}
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