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https://github.com/AsahiLinux/u-boot
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46f3e3851d
The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
61 lines
2 KiB
C
61 lines
2 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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/*
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* LAW (Local Access Window) configuration:
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*
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* 0x0000_0000 DDR 256M
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* 0x1000_0000 DDR2 256M
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* 0x8000_0000 PCIE1 MEM 512M
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* 0xa000_0000 PCIE2 MEM 512M
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* 0xc000_0000 RapidIO 512M
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* 0xe200_0000 PCIE1 IO 16M
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* 0xe300_0000 PCIE2 IO 16M
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* 0xf800_0000 CCSRBAR 2M
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* 0xfe00_0000 FLASH (boot bank) 32M
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*
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*/
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struct law_entry law_table[] = {
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#if !defined(CONFIG_SPD_EEPROM)
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SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
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SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
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LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
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#endif
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SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
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SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
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SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
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SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
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SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
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SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC),
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SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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