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057b613990
The Nomadik Multi Timer Unit (MTU) provides 4 decrementing free-running timers. It is used in ST-Ericsson Ux500 SoCs. The driver uses the first timer to implement UCLASS_TIMER. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
114 lines
2.9 KiB
C
114 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
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*
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* Based on arch/arm/cpu/armv7/u8500/timer.c:
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* Copyright (C) 2010 Linaro Limited
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* John Rigby <john.rigby@linaro.org>
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*
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* Based on Linux kernel source and internal ST-Ericsson U-Boot source:
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* Copyright (C) 2009 Alessandro Rubini
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* Copyright (C) 2010 ST-Ericsson
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* Copyright (C) 2010 Linus Walleij for ST-Ericsson
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*/
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#include <common.h>
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#include <dm.h>
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#include <timer.h>
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#include <asm/io.h>
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#define MTU_NUM_TIMERS 4
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/* The timers */
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struct nomadik_mtu_timer_regs {
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u32 lr; /* Load register */
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u32 cv; /* Current value */
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u32 cr; /* Control register */
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u32 bglr; /* Background load register */
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};
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/* The MTU that contains the timers */
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struct nomadik_mtu_regs {
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u32 imsc; /* Interrupt mask set/clear */
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u32 ris; /* Raw interrupt status */
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u32 mis; /* Masked interrupt status */
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u32 icr; /* Interrupt clear register */
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struct nomadik_mtu_timer_regs timers[MTU_NUM_TIMERS];
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};
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/* Bits for the control register */
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#define MTU_CR_ONESHOT BIT(0) /* if 0 = wraps reloading from BGLR */
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#define MTU_CR_32BITS BIT(1) /* if 0 = 16-bit counter */
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#define MTU_CR_PRESCALE_SHIFT 2
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#define MTU_CR_PRESCALE_1 (0 << MTU_CR_PRESCALE_SHIFT)
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#define MTU_CR_PRESCALE_16 (1 << MTU_CR_PRESCALE_SHIFT)
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#define MTU_CR_PRESCALE_256 (2 << MTU_CR_PRESCALE_SHIFT)
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#define MTU_CR_PERIODIC BIT(6) /* if 0 = free-running */
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#define MTU_CR_ENABLE BIT(7)
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struct nomadik_mtu_priv {
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struct nomadik_mtu_timer_regs *timer;
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};
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static int nomadik_mtu_get_count(struct udevice *dev, u64 *count)
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{
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struct nomadik_mtu_priv *priv = dev_get_priv(dev);
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/* Decrementing counter: invert the value */
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*count = timer_conv_64(~readl(&priv->timer->cv));
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return 0;
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}
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static int nomadik_mtu_probe(struct udevice *dev)
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{
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struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct nomadik_mtu_priv *priv = dev_get_priv(dev);
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struct nomadik_mtu_regs *mtu;
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fdt_addr_t addr;
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u32 prescale;
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addr = dev_read_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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mtu = (struct nomadik_mtu_regs *)addr;
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priv->timer = mtu->timers; /* Use first timer */
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if (!uc_priv->clock_rate)
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return -EINVAL;
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/* Use divide-by-16 counter if tick rate is more than 32 MHz */
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if (uc_priv->clock_rate > 32000000) {
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uc_priv->clock_rate /= 16;
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prescale = MTU_CR_PRESCALE_16;
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} else {
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prescale = MTU_CR_PRESCALE_1;
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}
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/* Configure a free-running, auto-wrap counter with selected prescale */
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writel(MTU_CR_ENABLE | prescale | MTU_CR_32BITS, &priv->timer->cr);
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return 0;
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}
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static const struct timer_ops nomadik_mtu_ops = {
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.get_count = nomadik_mtu_get_count,
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};
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static const struct udevice_id nomadik_mtu_ids[] = {
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{ .compatible = "st,nomadik-mtu" },
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{}
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};
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U_BOOT_DRIVER(nomadik_mtu) = {
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.name = "nomadik_mtu",
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.id = UCLASS_TIMER,
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.of_match = nomadik_mtu_ids,
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.priv_auto_alloc_size = sizeof(struct nomadik_mtu_priv),
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.probe = nomadik_mtu_probe,
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.ops = &nomadik_mtu_ops,
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};
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