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d0686a02b9
After starting or setting the rate of a PLL, the enable bit must be set. This fixes a bug where the AI ram would not be accessible, because it requires PLL1 to be running. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com> |
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| .. | ||
| bypass.c | ||
| clk.c | ||
| Kconfig | ||
| Makefile | ||
| pll.c | ||