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https://github.com/AsahiLinux/u-boot
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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
185 lines
3.4 KiB
ArmAsm
185 lines
3.4 KiB
ArmAsm
/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/macro.h>
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.global lowlevel_init
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.text
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.align 2
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lowlevel_init:
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write16 WTCSR_A, WTCSR_D
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write16 WTCNT_A, WTCNT_D
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write16 FRQCR_A, FRQCR_D
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write16 UCLKCR_A, UCLKCR_D
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write32 CMNCR_A, CMNCR_D
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write32 CMNCR_A, CMNCR_D
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write32 CS0BCR_A, CS0BCR_D
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write32 CS2BCR_A, CS2BCR_D
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write32 CS3BCR_A, CS3BCR_D
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write32 CS4BCR_A, CS4BCR_D
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write32 CS5ABCR_A, CS5ABCR_D
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write32 CS5BBCR_A, CS5BBCR_D
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write32 CS6ABCR_A, CS6ABCR_D
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write32 CS6BBCR_A, CS6BBCR_D
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write32 CS0WCR_A, CS0WCR_D
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write32 CS2WCR_A, CS2WCR_D
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write32 CS3WCR_A, CS3WCR_D
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write32 CS4WCR_A, CS4WCR_D
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write32 CS5AWCR_A, CS5AWCR_D
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write32 CS5BWCR_A, CS5BWCR_D
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write32 CS6AWCR_A, CS6AWCR_D
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write32 CS6BWCR_A, CS6BWCR_D
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write32 SDCR_A, SDCR_D1
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write32 RTCSR_A, RTCSR_D
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write32 RTCNT_A RTCNT_D
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write32 RTCOR_A, RTCOR_D
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write32 SDCR_A, SDCR_D2
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write16 SDMR3_A, SDMR3_D
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write16 PCCR_A, PCCR_D
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write16 PDCR_A, PDCR_D
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write16 PECR_A, PECR_D
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write16 PGCR_A, PGCR_D
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write16 PHCR_A, PHCR_D
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write16 PPCR_A, PPCR_D
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write16 PTCR_A, PTCR_D
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write16 PVCR_A, PVCR_D
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write16 PSELA_A, PSELA_D
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write32 CCR_A, CCR_D
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write8 LED_A, LED_D
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rts
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nop
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.align 4
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FRQCR_A: .long 0xA415FF80 /* FRQCR Address */
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WTCNT_A: .long 0xA415FF84
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WTCSR_A: .long 0xA415FF86
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UCLKCR_A: .long 0xA40A0008
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FRQCR_D: .word 0x1103 /* I:B:P=8:4:2 */
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WTCNT_D: .word 0x5A00
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WTCSR_D: .word 0xA506
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UCLKCR_D: .word 0xA5C0
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#define BSC_BASE 0xA4FD0000
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CMNCR_A: .long BSC_BASE
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CS0BCR_A: .long BSC_BASE + 0x04
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CS2BCR_A: .long BSC_BASE + 0x08
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CS3BCR_A: .long BSC_BASE + 0x0C
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CS4BCR_A: .long BSC_BASE + 0x10
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CS5ABCR_A: .long BSC_BASE + 0x14
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CS5BBCR_A: .long BSC_BASE + 0x18
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CS6ABCR_A: .long BSC_BASE + 0x1C
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CS6BBCR_A: .long BSC_BASE + 0x20
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CS0WCR_A: .long BSC_BASE + 0x24
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CS2WCR_A: .long BSC_BASE + 0x28
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CS3WCR_A: .long BSC_BASE + 0x2C
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CS4WCR_A: .long BSC_BASE + 0x30
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CS5AWCR_A: .long BSC_BASE + 0x34
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CS5BWCR_A: .long BSC_BASE + 0x38
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CS6AWCR_A: .long BSC_BASE + 0x3C
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CS6BWCR_A: .long BSC_BASE + 0x40
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SDCR_A: .long BSC_BASE + 0x44
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RTCSR_A: .long BSC_BASE + 0x48
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RTCNT_A: .long BSC_BASE + 0x4C
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RTCOR_A: .long BSC_BASE + 0x50
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SDMR3_A: .long BSC_BASE + 0x58C0
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CMNCR_D: .long 0x00000010
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CS0BCR_D: .long 0x36DB0400
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CS2BCR_D: .long 0x36DB0400
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CS3BCR_D: .long 0x36DB4600
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CS4BCR_D: .long 0x36DB0400
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CS5ABCR_D: .long 0x36DB0400
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CS5BBCR_D: .long 0x36DB0200
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CS6ABCR_D: .long 0x36DB0400
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CS6BBCR_D: .long 0x36DB0400
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CS0WCR_D: .long 0x00000B01
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CS2WCR_D: .long 0x00000500
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CS3WCR_D: .long 0x00006D1B
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CS4WCR_D: .long 0x00000500
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CS5AWCR_D: .long 0x00000500
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CS5BWCR_D: .long 0x00000500
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CS6AWCR_D: .long 0x00000500
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CS6BWCR_D: .long 0x00000500
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SDCR_D1: .long 0x00000011
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RTCSR_D: .long 0xA55A0010
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RTCNT_D: .long 0xA55A001F
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RTCOR_D: .long 0xA55A001F
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SDMR3_D: .word 0x0000
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.align 2
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SDCR_D2: .long 0x00000811
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#define PFC_BASE 0xA4050100
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PCCR_A: .long PFC_BASE + 0x04
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PDCR_A: .long PFC_BASE + 0x06
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PECR_A: .long PFC_BASE + 0x08
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PGCR_A: .long PFC_BASE + 0x0C
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PHCR_A: .long PFC_BASE + 0x0E
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PPCR_A: .long PFC_BASE + 0x18
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PTCR_A: .long PFC_BASE + 0x1E
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PVCR_A: .long PFC_BASE + 0x22
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PSELA_A: .long PFC_BASE + 0x24
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PCCR_D: .word 0x0000
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PDCR_D: .word 0x0000
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PECR_D: .word 0x0000
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PGCR_D: .word 0x0000
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PHCR_D: .word 0x0000
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PPCR_D: .word 0x00AA
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PTCR_D: .word 0x0280
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PVCR_D: .word 0x0000
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PSELA_D: .word 0x0000
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.align 2
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CCR_A: .long 0xFFFFFFEC
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!CCR_D: .long 0x0000000D
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CCR_D: .long 0x0000000B
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LED_A: .long 0xB6800000
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LED_D: .long 0xFF
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