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85d0580e68
The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.
Fixes:
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.. | ||
upower | ||
cgc.c | ||
clock.c | ||
iomux.c | ||
Kconfig | ||
lowlevel_init.S | ||
Makefile | ||
pcc.c | ||
rdc.c | ||
soc.c |