u-boot/arch/arm/dts/k3-am625-sk-u-boot.dtsi
Neha Malcom Francis ce46f51990 am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support added for HS-SE, HS-FS and GP boot binaries for AM62.

HS-SE:
    * tiboot3-am62x-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am62x-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am62x-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by AM62 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00

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// SPDX-License-Identifier: GPL-2.0
/*
* Common AM625 SK dts file for SPLs
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "k3-am625-sk-binman.dtsi"
/ {
chosen {
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
};
aliases {
mmc1 = &sdhci1;
};
memory@80000000 {
bootph-pre-ram;
};
};
&cbass_main{
bootph-pre-ram;
timer1: timer@2400000 {
compatible = "ti,omap5430-timer";
reg = <0x00 0x2400000 0x00 0x80>;
ti,timer-alwon;
clock-frequency = <25000000>;
bootph-pre-ram;
};
};
&dmss {
bootph-pre-ram;
};
&secure_proxy_main {
bootph-pre-ram;
};
&dmsc {
bootph-pre-ram;
};
&k3_pds {
bootph-pre-ram;
};
&k3_clks {
bootph-pre-ram;
};
&k3_reset {
bootph-pre-ram;
};
&wkup_conf {
bootph-pre-ram;
};
&chipid {
bootph-pre-ram;
};
&main_pmx0 {
bootph-pre-ram;
};
&main_uart0 {
bootph-pre-ram;
};
&main_uart0_pins_default {
bootph-pre-ram;
};
&main_uart1 {
bootph-pre-ram;
};
&cbass_mcu {
bootph-pre-ram;
};
&cbass_wakeup {
bootph-pre-ram;
};
&mcu_pmx0 {
bootph-pre-ram;
};
&wkup_uart0 {
bootph-pre-ram;
};
&sdhci1 {
bootph-pre-ram;
};
&main_mmc1_pins_default {
bootph-pre-ram;
};
&fss {
bootph-pre-ram;
};
&ospi0_pins_default {
bootph-pre-ram;
};
&ospi0 {
bootph-pre-ram;
flash@0 {
bootph-pre-ram;
partitions {
bootph-pre-ram;
partition@3fc0000 {
bootph-pre-ram;
};
};
};
};
&cpsw3g {
reg = <0x0 0x8000000 0x0 0x200000>,
<0x0 0x43000200 0x0 0x8>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
bootph-pre-ram;
cpsw-phy-sel@04044 {
compatible = "ti,am64-phy-gmii-sel";
reg = <0x0 0x00104044 0x0 0x8>;
bootph-pre-ram;
};
};
&cpsw_port1 {
bootph-pre-ram;
};
&cpsw_port2 {
status = "disabled";
};