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u-boot/arch/arm/mach-zynqmp
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Ashok Reddy Soma aee1ed87e7 arm64: zynqmp: Fix application loading on R5 core1 
From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute differenet
applications. Handle both these lock-step and split modes by propagating
mode and RPU core number(4 for RPU0 and 5 for RPU1) for various functions
and by adding conditions in those functions.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
..
include/mach zynqmp: spl: support DRAM ECC initialization 2021-06-23 09:48:35 +02:00
clk.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
cpu.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
ecc_spl_init.c zynqmp: spl: support DRAM ECC initialization 2021-06-23 09:48:35 +02:00
handoff.c arm64: zynqmp: Change bl2_plat_get_bl31_params() guarding 2020-09-23 10:31:40 +02:00
Kconfig zynqmp: spl: support DRAM ECC initialization 2021-06-23 09:48:35 +02:00
Makefile zynqmp: spl: support DRAM ECC initialization 2021-06-23 09:48:35 +02:00
mkimage_fit_atf.sh arm64: zynqmp: Add support for u-boot.itb generation without ATF 2020-04-06 12:52:45 +02:00
mp.c arm64: zynqmp: Fix application loading on R5 core1 2021-06-23 09:48:35 +02:00
psu_spl_init.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
spl.c zynqmp: spl: support DRAM ECC initialization 2021-06-23 09:48:35 +02:00