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ac80ac09c8
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
only publicly-available compatible carrier card. The SoM is based on the EV
version of the Xilinx ZynqMP SoC+FPGA.
The psu_init_gpl.c file has been generated from the board definition files
at [0] using Vivado 2018.3 and then minimized by
tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
it is not mentioned in device tree and fixed a checkpatch error.
[0] 3686c9ff7d/ultrazed_7ev_cc/1.1
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
59 lines
1 KiB
Text
59 lines
1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* UltraZed-EV Carrier Card v1 (based on the UltraZed-EV SoM)
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* http://ultrazed.org/product/ultrazed-ev-carrier-card
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*/
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/dts-v1/;
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#include "avnet-ultrazedev-som-v1.0.dtsi"
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/ {
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model = "Avnet UltraZed EV Carrier Card v1.0";
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compatible = "avnet,ultrazedev-cc-v1.0-ultrazedev-som-v1.0",
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"xlnx,zynqmp";
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chosen {
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stdout-path = "serial0:115200n8";
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xlnx,eeprom = &eeprom;
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};
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aliases {
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ethernet0 = &gem3;
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serial0 = &uart0;
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};
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};
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&uart0 {
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device_type = "serial";
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status = "okay";
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};
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&i2c_cc {
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/* Microchip 24AA025E48T-I/OT: 2K I2C Serial EEPROM with EUI-48 */
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eeprom: eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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};
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/* IDT Versa Clock 5P49V5935B */
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vc5: clock-generator@6a {
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compatible = "idt,5p49v5935";
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reg = <0x6a>;
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#clock-cells = <1>;
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};
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};
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/* Ethernet RJ-45 */
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&gem3 {
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status = "okay";
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};
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/* microSD card slot */
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&sdhci1 {
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status = "okay";
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xlnx,mio_bank = <1>;
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clock-frequency = <199998000>;
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max-frequency = <50000000>;
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no-1-8-v;
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disable-wp;
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};
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