u-boot/board/AndesTech/ax25-ae350/ax25-ae350.c
Rick Chen cd61e86e6d riscv: ax25-ae350: add SPL configuration
This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.

With ae350_rv[32|64]_spl_defconfigs:

U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.

With ae350_rv[32|64]_spl_xip_defconfigs:

U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00

139 lines
2.6 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
#include <common.h>
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
#include <netdev.h>
#endif
#include <linux/io.h>
#include <faraday/ftsmc020.h>
#include <fdtdec.h>
#include <dm.h>
#include <spl.h>
DECLARE_GLOBAL_DATA_PTR;
extern phys_addr_t prior_stage_fdt_address;
/*
* Miscellaneous platform dependent initializations
*/
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
return 0;
}
int dram_init(void)
{
unsigned long sdram_base = PHYS_SDRAM_0;
unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
unsigned long actual_size;
actual_size = get_ram_size((void *)sdram_base, expected_size);
gd->ram_size = actual_size;
if (expected_size != actual_size) {
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
}
return 0;
}
int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
return 0;
}
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
int board_eth_init(bd_t *bd)
{
return ftmac100_initialize(bd);
}
#endif
ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
return 0;
}
void *board_fdt_blob_setup(void)
{
return (void *)CONFIG_SYS_FDT_BASE;
}
int smc_init(void)
{
int node = -1;
const char *compat = "andestech,atfsmc020";
void *blob = (void *)gd->fdt_blob;
fdt_addr_t addr;
struct ftsmc020_bank *regs;
node = fdt_node_offset_by_compatible(blob, -1, compat);
if (node < 0)
return -FDT_ERR_NOTFOUND;
addr = fdtdec_get_addr(blob, node, "reg");
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
regs = (struct ftsmc020_bank *)addr;
regs->cr &= ~FTSMC020_BANK_WPROT;
return 0;
}
static void v5l2_init(void)
{
struct udevice *dev;
uclass_get_device(UCLASS_CACHE, 0, &dev);
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
smc_init();
v5l2_init();
return 0;
}
#endif
#ifdef CONFIG_SPL
void board_boot_order(u32 *spl_boot_list)
{
u8 i;
u32 boot_devices[] = {
#ifdef CONFIG_SPL_RAM_SUPPORT
BOOT_DEVICE_RAM,
#endif
#ifdef CONFIG_SPL_MMC_SUPPORT
BOOT_DEVICE_MMC1,
#endif
};
for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
spl_boot_list[i] = boot_devices[i];
}
#endif
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
/* boot using first FIT config */
return 0;
}
#endif