u-boot/configs/imx8mn_var_som_defconfig
Hugo Villeneuve 1b4c3e6125 imx8mn-var-som: adjust PHY reset gpios according to hardware configuration
For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.

For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.

The hardware configuration (EC) is determined at runtime by
reading from the SOM EEPROM.

To support both hardware configurations (EC and non-EC), adjust/fix
the PHY reset gpios according to the hardware configuration
read at runtime from the SOM EEPROM. This adjustement is done in
U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
2023-07-13 11:29:40 +02:00

116 lines
2.9 KiB
Text

CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-var-som-symphony"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_VAR_SOM=y
CONFIG_SYS_PROMPT="> "
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_OF_BOARD_FIXUP=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb"
CONFIG_BOARD_TYPES=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SYS_SPL_MALLOC=y
CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2067
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FEC"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x40480000
CONFIG_FASTBOOT_BUF_SIZE=0x20000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=2
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_BD71837=y
CONFIG_SPL_DM_PMIC_BD71837=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_IMX_WATCHDOG=y