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https://github.com/AsahiLinux/u-boot
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4df6689495
On OMAP36/37XX the standard on chip pullups are not sufficient to ensure proper i2c operation without external pullups or switching to high speed mode and enabling special on chip pullups. This is an issue for Beagle xM, which does not have external pullups on the expansion board i2c lines. The issue manifests itself as an AL (arbitration lost) error when probing for a non-existent device (i.e. on a Beagle xM with no expansion boards attached). This issue does not occur on expansion boards that include pullups or on Overo 37XX COM's since they include pull-ups. This patch fixes the issue by checking for the AL bit in the i2c_probe function. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
485 lines
11 KiB
C
485 lines
11 KiB
C
/*
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* Basic I2C functions
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*
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* Copyright (c) 2004 Texas Instruments
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*
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* This package is free software; you can redistribute it and/or
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* modify it under the terms of the license found in the file
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* named COPYING that should have accompanied this file.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*
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* Author: Jian Zhang jzhang@ti.com, Texas Instruments
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*
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* Copyright (c) 2003 Wolfgang Denk, wd@denx.de
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* Rewritten to fit into the current U-Boot framework
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*
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* Adapted for OMAP2420 I2C, r-woodruff2@ti.com
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*
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*/
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#include <common.h>
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#include <asm/arch/i2c.h>
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#include <asm/io.h>
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#include "omap24xx_i2c.h"
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#define I2C_TIMEOUT 1000
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static void wait_for_bb (void);
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static u16 wait_for_pin (void);
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static void flush_fifo(void);
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static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
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static unsigned int bus_initialized[I2C_BUS_MAX];
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static unsigned int current_bus;
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void i2c_init (int speed, int slaveadd)
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{
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DECLARE_GLOBAL_DATA_PTR;
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int psc, fsscll, fssclh;
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int hsscll = 0, hssclh = 0;
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u32 scll, sclh;
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int timeout = I2C_TIMEOUT;
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/* Only handle standard, fast and high speeds */
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if ((speed != OMAP_I2C_STANDARD) &&
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(speed != OMAP_I2C_FAST_MODE) &&
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(speed != OMAP_I2C_HIGH_SPEED)) {
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printf("Error : I2C unsupported speed %d\n", speed);
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return;
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}
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psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
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psc -= 1;
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if (psc < I2C_PSC_MIN) {
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printf("Error : I2C unsupported prescalar %d\n", psc);
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return;
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}
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if (speed == OMAP_I2C_HIGH_SPEED) {
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/* High speed */
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/* For first phase of HS mode */
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fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
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(2 * OMAP_I2C_FAST_MODE);
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fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
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fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
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if (((fsscll < 0) || (fssclh < 0)) ||
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((fsscll > 255) || (fssclh > 255))) {
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printf("Error : I2C initializing first phase clock\n");
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return;
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}
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/* For second phase of HS mode */
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hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
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hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
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hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
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if (((fsscll < 0) || (fssclh < 0)) ||
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((fsscll > 255) || (fssclh > 255))) {
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printf("Error : I2C initializing second phase clock\n");
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return;
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}
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scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
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sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh;
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} else {
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/* Standard and fast speed */
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fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
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fsscll -= I2C_FASTSPEED_SCLL_TRIM;
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fssclh -= I2C_FASTSPEED_SCLH_TRIM;
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if (((fsscll < 0) || (fssclh < 0)) ||
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((fsscll > 255) || (fssclh > 255))) {
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printf("Error : I2C initializing clock\n");
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return;
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}
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scll = (unsigned int)fsscll;
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sclh = (unsigned int)fssclh;
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}
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if (readw (&i2c_base->con) & I2C_CON_EN) {
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writew (0, &i2c_base->con);
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udelay (50000);
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}
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writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */
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udelay(1000);
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writew(I2C_CON_EN, &i2c_base->con);
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while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
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if (timeout <= 0) {
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printf("ERROR: Timeout in soft-reset\n");
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return;
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}
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udelay(1000);
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}
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writew(0, &i2c_base->con);
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writew(psc, &i2c_base->psc);
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writew(scll, &i2c_base->scll);
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writew(sclh, &i2c_base->sclh);
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/* own address */
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writew (slaveadd, &i2c_base->oa);
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writew (I2C_CON_EN, &i2c_base->con);
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/* have to enable intrrupts or OMAP i2c module doesn't work */
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writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
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I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
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udelay (1000);
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flush_fifo();
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writew (0xFFFF, &i2c_base->stat);
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writew (0, &i2c_base->cnt);
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if (gd->flags & GD_FLG_RELOC)
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bus_initialized[current_bus] = 1;
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}
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static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
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{
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int i2c_error = 0;
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u16 status;
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/* wait until bus not busy */
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wait_for_bb ();
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/* one byte only */
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writew (1, &i2c_base->cnt);
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/* set slave address */
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writew (devaddr, &i2c_base->sa);
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/* no stop bit needed here */
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, &i2c_base->con);
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/* send register offset */
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while (1) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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i2c_error = 1;
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goto read_exit;
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}
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if (status & I2C_STAT_XRDY) {
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/* Important: have to use byte access */
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writeb(regoffset, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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}
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if (status & I2C_STAT_ARDY) {
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writew(I2C_STAT_ARDY, &i2c_base->stat);
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break;
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}
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}
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/* set slave address */
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writew(devaddr, &i2c_base->sa);
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/* read one byte from slave */
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writew(1, &i2c_base->cnt);
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/* need stop bit here */
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writew(I2C_CON_EN | I2C_CON_MST |
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I2C_CON_STT | I2C_CON_STP,
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&i2c_base->con);
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/* receive data */
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while (1) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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i2c_error = 1;
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goto read_exit;
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}
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if (status & I2C_STAT_RRDY) {
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX)
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*value = readb(&i2c_base->data);
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#else
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*value = readw(&i2c_base->data);
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#endif
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writew(I2C_STAT_RRDY, &i2c_base->stat);
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}
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if (status & I2C_STAT_ARDY) {
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writew(I2C_STAT_ARDY, &i2c_base->stat);
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break;
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}
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}
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read_exit:
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flush_fifo();
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writew (0xFFFF, &i2c_base->stat);
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writew (0, &i2c_base->cnt);
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return i2c_error;
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}
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static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
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{
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int i2c_error = 0;
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u16 status;
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/* wait until bus not busy */
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wait_for_bb ();
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/* two bytes */
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writew (2, &i2c_base->cnt);
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/* set slave address */
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writew (devaddr, &i2c_base->sa);
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/* stop bit needed here */
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
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I2C_CON_STP, &i2c_base->con);
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while (1) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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i2c_error = 1;
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goto write_exit;
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}
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if (status & I2C_STAT_XRDY) {
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX)
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/* send register offset */
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writeb(regoffset, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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while (1) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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i2c_error = 1;
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goto write_exit;
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}
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if (status & I2C_STAT_XRDY) {
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/* send data */
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writeb(value, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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}
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if (status & I2C_STAT_ARDY) {
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writew(I2C_STAT_ARDY, &i2c_base->stat);
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break;
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}
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}
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break;
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#else
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/* send out two bytes */
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writew((value << 8) + regoffset, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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#endif
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}
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if (status & I2C_STAT_ARDY) {
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writew(I2C_STAT_ARDY, &i2c_base->stat);
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break;
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}
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}
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wait_for_bb();
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status = readw(&i2c_base->stat);
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if (status & I2C_STAT_NACK)
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i2c_error = 1;
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write_exit:
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flush_fifo();
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writew (0xFFFF, &i2c_base->stat);
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writew (0, &i2c_base->cnt);
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return i2c_error;
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}
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static void flush_fifo(void)
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{ u16 stat;
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/* note: if you try and read data when its not there or ready
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* you get a bus error
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*/
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while(1){
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stat = readw(&i2c_base->stat);
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if(stat == I2C_STAT_RRDY){
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX)
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readb(&i2c_base->data);
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#else
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readw(&i2c_base->data);
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#endif
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writew(I2C_STAT_RRDY,&i2c_base->stat);
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udelay(1000);
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}else
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break;
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}
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}
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int i2c_probe (uchar chip)
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{
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u16 status;
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int res = 1; /* default = fail */
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if (chip == readw (&i2c_base->oa)) {
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return res;
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}
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/* wait until bus not busy */
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wait_for_bb ();
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/* try to read one byte */
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writew (1, &i2c_base->cnt);
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/* set slave address */
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writew (chip, &i2c_base->sa);
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/* stop bit needed here */
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c_base->con);
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while (1) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_AL) {
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res = 1;
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goto probe_exit;
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}
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if (status & I2C_STAT_NACK) {
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res = 1;
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writew(0xff, &i2c_base->stat);
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writew (readw (&i2c_base->con) | I2C_CON_STP, &i2c_base->con);
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wait_for_bb ();
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break;
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}
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if (status & I2C_STAT_ARDY) {
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writew(I2C_STAT_ARDY, &i2c_base->stat);
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break;
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}
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if (status & I2C_STAT_RRDY) {
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res = 0;
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#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX)
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readb(&i2c_base->data);
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#else
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readw(&i2c_base->data);
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#endif
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writew(I2C_STAT_RRDY, &i2c_base->stat);
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}
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}
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probe_exit:
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flush_fifo();
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writew (0, &i2c_base->cnt); /* don't allow any more data in...we don't want it.*/
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writew(0xFFFF, &i2c_base->stat);
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return res;
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}
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int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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int i;
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if (alen > 1) {
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printf ("I2C read: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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printf ("I2C read: address out of range\n");
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return 1;
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}
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for (i = 0; i < len; i++) {
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if (i2c_read_byte (chip, addr + i, &buffer[i])) {
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printf ("I2C read: I/O error\n");
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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return 1;
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}
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}
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return 0;
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}
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int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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int i;
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if (alen > 1) {
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printf ("I2C read: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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printf ("I2C read: address out of range\n");
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return 1;
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}
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for (i = 0; i < len; i++) {
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if (i2c_write_byte (chip, addr + i, buffer[i])) {
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printf ("I2C read: I/O error\n");
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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return 1;
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}
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}
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return 0;
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}
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static void wait_for_bb (void)
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{
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int timeout = I2C_TIMEOUT;
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u16 stat;
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writew(0xFFFF, &i2c_base->stat); /* clear current interruts...*/
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while ((stat = readw (&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
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writew (stat, &i2c_base->stat);
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udelay(1000);
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}
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if (timeout <= 0) {
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printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
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readw (&i2c_base->stat));
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}
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writew(0xFFFF, &i2c_base->stat); /* clear delayed stuff*/
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}
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static u16 wait_for_pin (void)
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{
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u16 status;
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int timeout = I2C_TIMEOUT;
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do {
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udelay (1000);
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status = readw (&i2c_base->stat);
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} while ( !(status &
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(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
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I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
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I2C_STAT_AL)) && timeout--);
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if (timeout <= 0) {
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printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
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readw (&i2c_base->stat));
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writew(0xFFFF, &i2c_base->stat);
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status = 0;
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}
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return status;
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}
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int i2c_set_bus_num(unsigned int bus)
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{
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if ((bus < 0) || (bus >= I2C_BUS_MAX)) {
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printf("Bad bus: %d\n", bus);
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return -1;
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}
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#if I2C_BUS_MAX==3
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if (bus == 2)
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i2c_base = (struct i2c *)I2C_BASE3;
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else
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#endif
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if (bus == 1)
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i2c_base = (struct i2c *)I2C_BASE2;
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else
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i2c_base = (struct i2c *)I2C_BASE1;
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current_bus = bus;
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if(!bus_initialized[current_bus])
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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return 0;
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}
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int i2c_get_bus_num(void)
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{
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return (int) current_bus;
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|
}
|