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We have duplication of sources which makes it hard to sustain across the board, but at the same time, we'd like to ensure readers get specific information without having to cross refer to different documentation to get piecemeal information that they need to put together. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Nishanth Menon <nm@ti.com>
417 lines
14 KiB
ReStructuredText
417 lines
14 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Bryan Brattlof <bb@ti.com>
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K3 Generation
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=============
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Summary
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-------
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Texas Instrument's K3 family of SoCs utilize a heterogeneous multicore
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and highly integrated device architecture targeted to maximize
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performance and power efficiency for a wide range of industrial,
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automotive and other broad market segments.
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Typically the processing cores and the peripherals for these devices are
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partitioned into three functional domains to provide ultra-low power
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modes as well as accommodating application and industrial safety systems
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on the same SoC. These functional domains are typically called the:
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* Wakeup (WKUP) domain
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* Micro-controller (MCU) domain
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* Main domain
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For a more detailed view of what peripherals are attached to each
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domain, consult the device specific documentation.
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K3 Based SoCs
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-------------
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.. toctree::
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:maxdepth: 1
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j721e_evm
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j7200_evm
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am62x_sk
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am65x_evm
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Boot Flow Overview
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------------------
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For all K3 SoCs the first core started will be inside the Security
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Management Subsystem (SMS) which will secure the device and start a core
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in the wakeup domain to run the ROM code. ROM will then initialize the
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boot media needed to load the binaries packaged inside `tiboot3.bin`,
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including a 32bit U-Boot SPL, (called the wakup SPL) that ROM will jump
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to after it has finished loading everything into internal SRAM.
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.. code-block:: text
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| WKUP Domain
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ROM -> WKUP SPL ->
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The wakeup SPL, running on a wakeup domain core, will initialize DDR and
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any peripherals needed load the larger binaries inside the `tispl.bin`
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into DDR. Once loaded the wakeup SPL will start one of the 'big'
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application cores inside the main domain to initialize the main domain,
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starting with Trusted Firmware-A (TF-A), before moving on to start
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OP-TEE and the main domain's U-Boot SPL.
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.. code-block:: text
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| WKUP Domain | Main Domain ->
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ROM -> WKUP SPL -> TF-A -> OP-TEE -> Main SPL
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The main domain's SPL, running on a 64bit application core, has
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virtually unlimited space (billions of bytes now that DDR is working) to
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initialize even more peripherals needed to load in the `u-boot.img`
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which loads more firmware into the micro-controller & wakeup domains and
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finally prepare the main domain to run Linux.
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.. code-block:: text
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| WKUP Domain | Main Domain ->
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ROM -> WKUP SPL -> TF-A -> OP-TEE -> Main SPL -> UBoot -> Linux
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This is the typical boot flow for all K3 based SoCs, however this flow
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offers quite a lot in the terms of flexibility, especially on High
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Security (HS) SoCs.
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Boot Flow Variations
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^^^^^^^^^^^^^^^^^^^^
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All K3 SoCs will generally use the above boot flow with two main
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differences depending on the capabilities of the boot ROM and the number
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of cores inside the device. These differences split the bootflow into
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essentially 4 unique but very similar flows:
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* Split binary with a combined firmware: (eg: AM65)
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* Combined binary with a combined firmware: (eg: AM64)
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* Split binary with a split firmware: (eg: J721E)
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* Combined binary with a split firmware: (eg: AM62)
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For devices that utilize the split binary approach, ROM is not capable
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of loading the firmware into the SoC requiring the wakeup domain's
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U-Boot SPL to load the firmware.
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Devices with a split firmware will have two firmwares loaded into the
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device at different times during the bootup process. TI's Foundational
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Security (TIFS), needed to operate the Security Management Subsystem,
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will either be loaded by ROM or the WKUP U-Boot SPL, then once the
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wakeup U-Boot SPL has completed, the second Device Management (DM)
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firmware can be loaded on the now free core in the wakeup domain.
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For more information on the bootup process of your SoC, consult the
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device specific boot flow documentation.
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Software Sources
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----------------
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All scripts and code needed to build the `tiboot3.bin`, `tispl.bin` and
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`u-boot.img` for all K3 SoCs can be located at the following places
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online
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.. k3_rst_include_start_boot_sources
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* **Das U-Boot**
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| **source:** https://source.denx.de/u-boot/u-boot.git
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| **branch:** master
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* **Trusted Firmware-A (TF-A)**
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| **source:** https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/
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| **branch:** master
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* **Open Portable Trusted Execution Environment (OP-TEE)**
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| **source:** https://github.com/OP-TEE/optee_os.git
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| **branch:** master
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* **TI Firmware (TIFS, DM, DSMC)**
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| **source:** https://git.ti.com/git/processor-firmware/ti-linux-firmware.git
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| **branch:** ti-linux-firmware
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.. k3_rst_include_end_boot_sources
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Build Procedure
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---------------
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Depending on the specifics of your device, you will need three or more
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binaries to boot your SoC.
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* `tiboot3.bin` (bootloader for the wakeup domain)
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* `tispl.bin` (bootloader for the main domain)
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* `u-boot.img`
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During the bootup process, both the 32bit wakeup domain and the 64bit
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main domains will be involved. This means everything inside the
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`tiboot3.bin` running in the wakeup domain will need to be compiled for
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32bit cores and most binaries in the `tispl.bin` will need to be
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compiled for 64bit main domain CPU cores.
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All of that to say you will need both a 32bit and 64bit cross compiler
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(assuming you're using an x86 desktop)
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.. code-block:: bash
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$ export CC32=arm-linux-gnueabihf-
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$ export CC64=aarch64-linux-gnu-
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Building tiboot3.bin
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^^^^^^^^^^^^^^^^^^^^^
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1. To generate the U-Boot SPL for the wakeup domain, use the following
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commands, substituting :code:`{SOC}` for the name of your device (eg:
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am62x) to package the various firmware and the wakeup UBoot SPL into
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the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
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uses the split binary flow)
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.. code-block:: bash
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$ # inside u-boot source
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$ make ARCH=arm {SOC}_evm_r5_defconfig
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$ make ARCH=arm CROSS_COMPILE=$CC32 \
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BINMAN_INDIRS=<path/to/ti-linux-firmware>
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At this point you should have all the needed binaries to boot the wakeup
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domain of your K3 SoC.
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**Combined Binary Boot Flow** (eg: am62x, am64x, ... )
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`tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
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**Split Binary Boot Flow** (eg: j721e, am65x)
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| `tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
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| `sysfw-{SOC}-{gp/hs-fs/hs}-evm.itb`
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.. note ::
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It's important to rename the generated `tiboot3.bin` and `sysfw.itb`
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to match exactly `tiboot3.bin` and `sysfw.itb` as ROM and the wakeup
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UBoot SPL will only look for and load the files with these names.
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Building tispl.bin
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^^^^^^^^^^^^^^^^^^^
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The `tispl.bin` is a standard fitImage combining the firmware need for
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the main domain to function properly as well as Device Management (DM)
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firmware if your device using a split firmware.
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2. We will first need TF-A, as it's the first thing to run on the 'big'
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application cores on the main domain.
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.. code-block:: bash
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$ # inside trusted-firmware-a source
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$ make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 \
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TARGET_BOARD={lite|generic|j784s4} \
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SPD=opteed
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Typically all `j7*` devices will use `TARGET_BOARD=generic` or `TARGET_BOARD
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=j784s4` (if it is a J784S4 device), while all Sitara (`am6*`) devices
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use the `lite` option.
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3. The Open Portable Trusted Execution Environment (OP-TEE) is designed
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to run as a companion to a non-secure Linux kernel for Cortex-A cores
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using the TrustZone technology built into the core.
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.. code-block:: bash
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$ # inside optee_os source
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$ make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 \
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PLATFORM=k3 CFG_ARM64_core=y
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4. Finally, after TF-A has initialized the main domain and OP-TEE has
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finished, we can jump back into U-Boot again, this time running on a
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64bit core in the main domain.
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.. code-block:: bash
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$ # inside u-boot source
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$ make ARCH=arm {SOC}_evm_a{53,72}_defconfig
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$ make ARCH=arm CROSS_COMPILE=$CC64 \
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BINMAN_INDIRS=<path/to/ti-linux-firmware> \
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BL31=<path/to/trusted-firmware-a/dir>/build/k3/generic/release/bl31.bin \
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TEE=<path/to/optee_os/dir>/out/arm-plat-k3/core/tee-raw.bin
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At this point you should have every binary needed initialize both the
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wakeup and main domain and to boot to the U-Boot prompt
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**Main Domain Bootloader**
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| `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
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| `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
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Fit Signature Signing
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---------------------
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K3 Platforms have fit signature signing enabled by default on their primary
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platforms. Here we'll take an example for creating fit image for J721e platform
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and the same can be extended to other platforms
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1. Describing FIT source
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.. code-block:: bash
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/dts-v1/;
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/ {
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description = "Kernel fitImage for j721e-hs-evm";
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#address-cells = <1>;
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images {
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kernel-1 {
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description = "Linux kernel";
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data = /incbin/("Image");
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type = "kernel";
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arch = "arm64";
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os = "linux";
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compression = "none";
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load = <0x80080000>;
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entry = <0x80080000>;
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hash-1 {
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algo = "sha512";
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};
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};
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fdt-ti_k3-j721e-common-proc-board.dtb {
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description = "Flattened Device Tree blob";
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data = /incbin/("k3-j721e-common-proc-board.dtb");
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type = "flat_dt";
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arch = "arm64";
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compression = "none";
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load = <0x83000000>;
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hash-1 {
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algo = "sha512";
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};
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};
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};
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configurations {
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default = "conf-ti_k3-j721e-common-proc-board.dtb";
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conf-ti_k3-j721e-common-proc-board.dtb {
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description = "Linux kernel, FDT blob";
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fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
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kernel = "kernel-1";
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signature-1 {
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algo = "sha512,rsa4096";
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key-name-hint = "custMpk";
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sign-images = "kernel", "fdt";
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};
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};
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};
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};
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You would require to change the '/incbin/' lines to point to the respective
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files in your local machine and the key-name-hint also needs to be changed
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if you are using some other key other than the TI dummy key that we are
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using for this example.
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2. Compile U-boot for the respective board
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.. code-block:: bash
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make O=build/a72 CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=arm
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BL31=/path/to/bl31.bin TEE=/path/to/bl32.bin
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BINMAN_INDIRS="/path/to/ti-linux-firmware" -j15
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.. note::
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The changes only affect a72 binaries so the example just builds that
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3. Sign the fit image and embed the dtb in uboot
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Now once the build is done, you'll have a dtb for your board that you'll
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be passing to mkimage for signing the fitImage and embedding the key in
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the u-boot dtb.
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.. code-block:: bash
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mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
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$UBOOT_PATH/build/a72/dts/dt.dtb
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For signing a secondary platform, pass the -K parameter to that DTB
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.. code-block:: bash
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mkimage -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
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$UBOOT_PATH/build/a72/arch/arm/dts/k3-j721e-sk.dtb
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.. note::
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If changing `CONFIG_DEFAULT_DEVICE_TREE` to the secondary platform,
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binman changes would also be required so that correct dtb gets packaged.
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.. code-block:: bash
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diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
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index 673be646b1e3..752fa805fe8d 100644
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--- a/arch/arm/dts/k3-j721e-binman.dtsi
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+++ b/arch/arm/dts/k3-j721e-binman.dtsi
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@@ -299,8 +299,8 @@
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#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
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#define UBOOT_NODTB "u-boot-nodtb.bin"
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-#define J721E_EVM_DTB "u-boot.dtb"
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-#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
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+#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
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+#define J721E_SK_DTB "u-boot.dtb"
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5. Rebuilt u-boot
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This is required so that the modified dtb gets updated in u-boot.img
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.. code-block:: bash
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make O=build/a72 CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=arm
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BL31=/path/to/bl31.bin TEE=/path/to/bl32.bin
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BINMAN_INDIRS="/path/to/ti-linux-firmware" -j15
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6. (Optional) Enabled FIT_SIGNATURE_ENFORCED
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By default u-boot will boot up the fit image without any authentication as
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such if the public key is not embedded properly, to check if the public key
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nodes are proper you can enable FIT_SIGNATURE_ENFORCED that would not rely
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on the dtb for anything else then the signature node for checking the fit
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image, rest other things will be enforced such as the property of
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required-keys. This is not an extensive check so do manual checks also
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This is by default enabled for devices with TI_SECURE_DEVICE enabled.
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.. note::
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The devices now also have distroboot enabled so if the fit image doesn't
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work then the fallback to normal distroboot will be there on hs devices,
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this will need to be explicitly disabled by changing the boot_targets.
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Saving environment
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------------------
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SAVEENV is disabled by default and for the new flow uses Uenv.txt as the default
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way for saving the environments. This has been done as Uenv.txt is more granular
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then the saveenv command and can be used across various bootmodes too.
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**Writing to MMC/EMMC**
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.. code-block::
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=> env export -t $loadaddr <list of variables>
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=> fatwrite mmc ${mmcdev} ${loadaddr} ${bootenvfile} ${filesize}
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**Reading from MMC/EMMC**
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By default run envboot will read it from the MMC/EMMC partition ( based on
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mmcdev) and set the environments.
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If manually needs to be done then the environment can be read from the
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filesystem and then imported
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.. code-block::
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=> fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
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=> env import -t ${loadaddr} ${filesize}
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