Gaurav Jain 2c16bf2d14 crypto/fsl: add invalidate_dcache_range for hash output buffer ... HW accelerated hash operations are giving incorrect hash output. so invalidate cache lines to avoid cache overwriting in DDR memory region. caam_hash() -moved address alignment check in the beginning of function. -added invalidate_dcache_range for pout buffer before running descriptor. Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands) Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>		2022-04-21 15:18:25 +02:00
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aspeed	crypto: aspeed: fix polling RSA status wrong issue	2022-02-21 08:35:40 -05:00
fsl	crypto/fsl: add invalidate_dcache_range for hash output buffer	2022-04-21 15:18:25 +02:00
hash	crypto: aspeed: Add AST2600 HACE support	2021-11-17 17:05:00 -05:00
rsa_mod_exp	dm: define LOG_CATEGORY for all uclass	2021-07-06 10:38:03 -06:00
ace_sha.c	common: Drop log.h from common header	2020-05-18 21:19:18 -04:00
ace_sha.h	doc: replace @return by Return:	2022-01-19 18:11:34 +01:00
Kconfig	crypto: aspeed: Add AST2600 HACE support	2021-11-17 17:05:00 -05:00
Makefile	crypto: aspeed: Add AST2600 HACE support	2021-11-17 17:05:00 -05:00