mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 09:48:16 +00:00
2d48caa47d
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM, 32MB QSPI NOR flash and 256MB NAND flash. The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC, 2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources and a fan controller. The "Florida" carrier boards add SD, USB, ethernet and other interfaces. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
34 lines
1 KiB
C
34 lines
1 KiB
C
/*
|
|
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
|
|
* (c) Copyright 2016 Topic Embedded Products.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#define OPCODE_EXIT 0U
|
|
#define OPCODE_MASKWRITE 0U
|
|
#define OPCODE_MASKPOLL 1U
|
|
#define OPCODE_MASKDELAY 2U
|
|
#define OPCODE_ADDRESS_MASK (~3U)
|
|
|
|
/* Sentinel */
|
|
#define EMIT_EXIT() OPCODE_EXIT
|
|
/* Opcode is in lower 2 bits of address, address is always 4-byte aligned */
|
|
#define EMIT_MASKWRITE(addr, mask, val) OPCODE_MASKWRITE | addr, mask, val
|
|
#define EMIT_MASKPOLL(addr, mask) OPCODE_MASKPOLL | addr, mask
|
|
#define EMIT_MASKDELAY(addr, mask) OPCODE_MASKDELAY | addr, mask
|
|
|
|
/* Returns codes of ps7_init* */
|
|
#define PS7_INIT_SUCCESS (0)
|
|
#define PS7_INIT_CORRUPT (1)
|
|
#define PS7_INIT_TIMEOUT (2)
|
|
#define PS7_POLL_FAILED_DDR_INIT (3)
|
|
#define PS7_POLL_FAILED_DMA (4)
|
|
#define PS7_POLL_FAILED_PLL (5)
|
|
|
|
/* Called by spl.c */
|
|
int ps7_init(void);
|
|
int ps7_post_config(void);
|
|
|
|
/* Defined in ps7_init_common.c */
|
|
int ps7_config(unsigned long *ps7_config_init);
|