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d4363baada
This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
44 lines
830 B
C
44 lines
830 B
C
/*
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* (C) Copyright 2016
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* Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals required for pinmux configuration. List will
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* grow with support for more devices getting added.
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* Numbering based on interrupt table.
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*
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*/
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enum periph_id {
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PERIPH_ID_USART1 = 37,
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PERIPH_ID_QUADSPI = 92,
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};
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enum periph_clock {
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USART1_CLOCK_CFG = 0,
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USART2_CLOCK_CFG,
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GPIO_A_CLOCK_CFG,
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GPIO_B_CLOCK_CFG,
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GPIO_C_CLOCK_CFG,
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GPIO_D_CLOCK_CFG,
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GPIO_E_CLOCK_CFG,
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GPIO_F_CLOCK_CFG,
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GPIO_G_CLOCK_CFG,
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GPIO_H_CLOCK_CFG,
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GPIO_I_CLOCK_CFG,
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GPIO_J_CLOCK_CFG,
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GPIO_K_CLOCK_CFG,
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SYSCFG_CLOCK_CFG,
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TIMER2_CLOCK_CFG,
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FMC_CLOCK_CFG,
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STMMAC_CLOCK_CFG,
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QSPI_CLOCK_CFG,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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