mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 23:02:59 +00:00
fa82f871c8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
129 lines
3.1 KiB
C
129 lines
3.1 KiB
C
/*
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* (C) Copyright 2008,2009
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/pci.h>
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#include <asm/ic/pci.h>
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static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
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{
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/* a configurable lists of IRQs to steal when we need one */
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static int irq_list[] = {
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CONFIG_SYS_FIRST_PCI_IRQ,
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CONFIG_SYS_SECOND_PCI_IRQ,
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CONFIG_SYS_THIRD_PCI_IRQ,
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CONFIG_SYS_FORTH_PCI_IRQ
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};
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static int next_irq_index=0;
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uchar tmp_pin;
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int pin;
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pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
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pin = tmp_pin;
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pin -= 1; /* PCI config space use 1-based numbering */
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if (pin == -1) {
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return; /* device use no irq */
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}
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/* map device number + pin to a pin on the sc520 */
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switch (PCI_DEV(dev)) {
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case 12: /* First Ethernet Chip */
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pin += SC520_PCI_INTA;
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break;
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case 13: /* Second Ethernet Chip */
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pin += SC520_PCI_INTB;
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break;
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default:
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return;
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}
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pin &= 3; /* wrap around */
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if (sc520_pci_ints[pin] == -1) {
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/* re-route one interrupt for us */
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if (next_irq_index > 3) {
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return;
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}
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if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
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return;
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}
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next_irq_index++;
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}
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if (-1 != sc520_pci_ints[pin]) {
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pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
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sc520_pci_ints[pin]);
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}
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printf("fixup_irq: device %d pin %c irq %d\n",
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PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
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}
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static struct pci_controller enet_hose = {
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fixup_irq: pci_enet_fixup_irq,
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};
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void pci_init_board(void)
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{
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pci_sc520_init(&enet_hose);
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}
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int pci_set_regions(struct pci_controller *hose)
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{
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/* System memory space */
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pci_set_region(hose->regions + 0,
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SC520_PCI_MEMORY_BUS,
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SC520_PCI_MEMORY_PHYS,
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SC520_PCI_MEMORY_SIZE,
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PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
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/* ISA/PCI memory space */
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pci_set_region(hose->regions + 1,
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SC520_ISA_MEM_BUS,
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SC520_ISA_MEM_PHYS,
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SC520_ISA_MEM_SIZE,
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PCI_REGION_MEM);
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/* PCI I/O space */
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pci_set_region(hose->regions + 2,
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SC520_PCI_IO_BUS,
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SC520_PCI_IO_PHYS,
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SC520_PCI_IO_SIZE,
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PCI_REGION_IO);
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/* ISA/PCI I/O space */
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pci_set_region(hose->regions + 3,
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SC520_ISA_IO_BUS,
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SC520_ISA_IO_PHYS,
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SC520_ISA_IO_SIZE,
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PCI_REGION_IO);
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return 4;
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}
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