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720d37ff27
Add PSIL data for AM62x SoC. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
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*/
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#include <linux/kernel.h>
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#include "k3-psil-priv.h"
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#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
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{ \
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.thread_id = x, \
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.ep_config = { \
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.ep_type = PSIL_EP_NATIVE, \
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.pkt_mode = 1, \
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.needs_epib = 1, \
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.psd_size = 16, \
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.mapped_channel_id = ch, \
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.flow_start = flow_base, \
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.flow_num = flow_cnt, \
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.default_flow_id = flow_base, \
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}, \
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}
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/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
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static struct psil_ep am62_src_ep_map[] = {
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/* CPSW3G */
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PSIL_ETHERNET(0x4600, 19, 19, 16),
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};
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/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
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static struct psil_ep am62_dst_ep_map[] = {
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/* CPSW3G */
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PSIL_ETHERNET(0xc600, 19, 19, 8),
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PSIL_ETHERNET(0xc601, 20, 27, 8),
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PSIL_ETHERNET(0xc602, 21, 35, 8),
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PSIL_ETHERNET(0xc603, 22, 43, 8),
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PSIL_ETHERNET(0xc604, 23, 51, 8),
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PSIL_ETHERNET(0xc605, 24, 59, 8),
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PSIL_ETHERNET(0xc606, 25, 67, 8),
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PSIL_ETHERNET(0xc607, 26, 75, 8),
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};
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struct psil_ep_map am62_ep_map = {
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.name = "am62",
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.src = am62_src_ep_map,
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.src_count = ARRAY_SIZE(am62_src_ep_map),
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.dst = am62_dst_ep_map,
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.dst_count = ARRAY_SIZE(am62_dst_ep_map),
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};
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